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authorAaron Durbin <adurbin@chromium.org>2020-04-11 10:06:37 -0600
committerAaron Durbin <adurbin@chromium.org>2020-05-01 23:28:37 +0000
commit806ea463dbc20c9a577923af51e9976baaf6790a (patch)
treee6f16749a1665aeeec900b1e0018fb6d34e77307 /src/soc/amd/picasso/include
parent00a220877c8fc27f161017e68b67fce23117c0ad (diff)
soc/amd/picasso: add sd/emmc0 configuration to chip.h
In order to isolate mainboard code from direct FSPS manipulation allow sd/emmc0 configuration to be supplied by devicetree.cb. BUG=b:153502861 Change-Id: I2569ccccd638faaf2c9ac68fe582ecb9fa967d9f Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2146439 Commit-Queue: Aaron Durbin <adurbin@google.com> Tested-by: Aaron Durbin <adurbin@google.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40876 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd/picasso/include')
-rw-r--r--src/soc/amd/picasso/include/soc/platform_descriptors.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/include/soc/platform_descriptors.h b/src/soc/amd/picasso/include/soc/platform_descriptors.h
index bc67550fd0..7a8444b062 100644
--- a/src/soc/amd/picasso/include/soc/platform_descriptors.h
+++ b/src/soc/amd/picasso/include/soc/platform_descriptors.h
@@ -8,6 +8,21 @@
#include <platform_descriptors.h>
#include <FspsUpd.h>
+/* These tempory macros apply to emmc0_mode field in FSP_S_CONFIG.
+ * TODO: Remove when official definitions arrive. */
+#define SD_DISABLE 0
+#define SD_LOW_SPEED 1
+#define SD_HIGH_SPEED 2
+#define SD_UHS_I_SDR_50 3
+#define SD_UHS_I_DDR_50 4
+#define SD_UHS_I_SDR_104 5
+#define EMMC_SDR_26 6
+#define EMMC_SDR_52 7
+#define EMMC_DDR_52 8
+#define EMMC_HS200 9
+#define EMMC_HS400 10
+#define EMMC_HS300 11
+
/* Mainboard callback to obtain PCIe and DDI descriptors. */
void mainboard_get_pcie_ddi_descriptors(
const picasso_fsp_pcie_descriptor **pcie_descs, size_t *pcie_num,