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authorRaul E Rangel <rrangel@chromium.org>2020-05-11 16:26:35 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-05-13 08:36:46 +0000
commit789aefc2272c2ffb3ca2c9380ccdc1a2288f2534 (patch)
treed7d68ddda073989308477c304d58a15439ca3ac8 /src/soc/amd/picasso/include
parent658a2913a5bbe9c638c0d069ea663ecb77b490b0 (diff)
soc/amd/picasso: Mark FCH MMIO addresses as non-posted
Immediately following FSP-S, update the data fabric routing registers to make the region between HPET and LAPIC as non-posted. If AGESA is modified to do this, we can delete data_fabric_util.c. If AGESA is modified to not program the registers, then we can simplify data_fabric_set_mmio_np(). BUG=b:147042464, b:156296146 TEST=boot trembyle Change-Id: Idbafaac158f5a4c533d2d88db79bb4d6244e5355 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41268 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/include')
-rw-r--r--src/soc/amd/picasso/include/soc/data_fabric.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/include/soc/data_fabric.h b/src/soc/amd/picasso/include/soc/data_fabric.h
index af9c200ce2..39906e8f95 100644
--- a/src/soc/amd/picasso/include/soc/data_fabric.h
+++ b/src/soc/amd/picasso/include/soc/data_fabric.h
@@ -24,4 +24,6 @@
#define NB_MMIO_LIMIT(reg) ((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_LIMIT0)
#define NB_MMIO_CONTROL(reg) ((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_CTRL0)
+void data_fabric_set_mmio_np(void);
+
#endif /* __SOC_PICASSO_DATAFABRIC_H__ */