From 789aefc2272c2ffb3ca2c9380ccdc1a2288f2534 Mon Sep 17 00:00:00 2001 From: Raul E Rangel Date: Mon, 11 May 2020 16:26:35 -0600 Subject: soc/amd/picasso: Mark FCH MMIO addresses as non-posted Immediately following FSP-S, update the data fabric routing registers to make the region between HPET and LAPIC as non-posted. If AGESA is modified to do this, we can delete data_fabric_util.c. If AGESA is modified to not program the registers, then we can simplify data_fabric_set_mmio_np(). BUG=b:147042464, b:156296146 TEST=boot trembyle Change-Id: Idbafaac158f5a4c533d2d88db79bb4d6244e5355 Signed-off-by: Marshall Dawson Signed-off-by: Raul E Rangel Reviewed-on: https://review.coreboot.org/c/coreboot/+/41268 Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/soc/amd/picasso/include/soc/data_fabric.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/amd/picasso/include') diff --git a/src/soc/amd/picasso/include/soc/data_fabric.h b/src/soc/amd/picasso/include/soc/data_fabric.h index af9c200ce2..39906e8f95 100644 --- a/src/soc/amd/picasso/include/soc/data_fabric.h +++ b/src/soc/amd/picasso/include/soc/data_fabric.h @@ -24,4 +24,6 @@ #define NB_MMIO_LIMIT(reg) ((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_LIMIT0) #define NB_MMIO_CONTROL(reg) ((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_CTRL0) +void data_fabric_set_mmio_np(void); + #endif /* __SOC_PICASSO_DATAFABRIC_H__ */ -- cgit v1.2.3