diff options
| author | Martin Roth <martinroth@chromium.org> | 2020-08-13 11:06:18 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2020-08-24 23:41:07 +0000 |
| commit | 50cca76e546bc5528be28ff99e717982d2783356 (patch) | |
| tree | bffd54b8a1ae738f841eeb6096b2019d1fe1a20d /src/soc/amd/picasso/bootblock | |
| parent | 9c9353422e73ab0d819eeaf970f4b892ee512b2c (diff) | |
soc/amd/picasso: Reboot for recovery if no psp workbuf is found
Instead of halting if the vboot workbuf is not passed to coreboot by the
PSP, reset and reboot into recovery mode.
This process is made more difficult because if the workbuf isn't
available, we can't reboot directly into recovery - the workbuf is
needed for that process to be done through the regular calls, and we
don't want to go around the vboot API and just write into VBNV directly.
To overcome this, we set a CMOS flag, and reset the system.
PSP_verstage checks for this flag so it will update VBNV and reset the
system after generating the workbuf.
BUG=b:152638343
TEST=Simulate the workbuf not being present and verify the reboot
process.
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: I049db956a5209904b274747be28ff226ce542316
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44538
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/picasso/bootblock')
| -rw-r--r-- | src/soc/amd/picasso/bootblock/bootblock.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/bootblock/bootblock.c b/src/soc/amd/picasso/bootblock/bootblock.c index 556fbad5fc..470002789f 100644 --- a/src/soc/amd/picasso/bootblock/bootblock.c +++ b/src/soc/amd/picasso/bootblock/bootblock.c @@ -2,6 +2,7 @@ #include <stdint.h> #include <symbols.h> +#include <amdblocks/reset.h> #include <bootblock_common.h> #include <console/console.h> #include <cpu/x86/cache.h> @@ -9,6 +10,8 @@ #include <cpu/amd/msr.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/mtrr.h> +#include <pc80/mc146818rtc.h> +#include <soc/psp_transfer.h> #include <soc/southbridge.h> #include <soc/i2c.h> #include <amdblocks/amd_pci_mmconf.h> @@ -135,7 +138,11 @@ void bootblock_soc_init(void) printk(BIOS_DEBUG, "Signature: %#08x\n", *(uint32_t *)_vboot2_work); - die("Halting.\n"); + cmos_init(0); + cmos_write(CMOS_RECOVERY_MAGIC_VAL, CMOS_RECOVERY_BYTE); + warm_reset(); + } else { + cmos_write(0x00, CMOS_RECOVERY_BYTE); } #endif |