diff options
author | Raul E Rangel <rrangel@chromium.org> | 2020-03-10 14:05:42 -0600 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-03 12:15:46 +0000 |
commit | 27b6b0ed72bbb7ba36096a5c278a416b0bc84f65 (patch) | |
tree | 98db9802f63b1b9479c313753332a4697b45abbd /src/soc/amd/picasso/acpi/sb_fch.asl | |
parent | 1761d33da6ff4a8dc3ab87b7279ef44c08622594 (diff) |
soc/amd/picasso/acpi: Remove hardcoded FCH IRQ numbers
Modify the FCH ACPI devices to query the PCI IRQ mapping registers for
their current IRQ numbers.
BUG=b:139429446, b:154756391
TEST=Boot trembyle and see that I2C and UART devices are finally
functional.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I8f2035f74240ead4089ff4d503dfbeb447cf8de4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41835
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd/picasso/acpi/sb_fch.asl')
-rw-r--r-- | src/soc/amd/picasso/acpi/sb_fch.asl | 260 |
1 files changed, 210 insertions, 50 deletions
diff --git a/src/soc/amd/picasso/acpi/sb_fch.asl b/src/soc/amd/picasso/acpi/sb_fch.asl index f8df3c059c..c5316482e5 100644 --- a/src/soc/amd/picasso/acpi/sb_fch.asl +++ b/src/soc/amd/picasso/acpi/sb_fch.asl @@ -26,12 +26,30 @@ Device (GPIO) Name (_UID, 0) Name (_DDN, GPIO_DEVICE_DESC) - Name (_CRS, ResourceTemplate() - { - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) - { 7 } - Memory32Fixed (ReadWrite, 0xFED81500, 0x300) - }) + Method (_CRS, 0) { + Name (RBUF, ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Level, + ActiveLow, + Exclusive, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, 0xFED81500, 0x300) + }) + CreateDWordField (RBUF, IRQR._INT, IRQN) + If (PMOD) { + IRQN = IGPI + } Else { + IRQN = PGPI + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, 0xFED81500, 0x300) + }) + } Else { + Return (RBUF) + } + } Method (_STA, 0x0, NotSerialized) { @@ -43,12 +61,33 @@ Device (FUR0) { Name (_HID, "AMD0020") Name (_UID, 0x0) - Name (_CRS, ResourceTemplate() - { - IRQ (Edge, ActiveHigh, Exclusive) { 10 } - Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000) - Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000) - }) + Method (_CRS, 0) { + Name (RBUF, ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Edge, + ActiveHigh, + Exclusive, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000) + }) + CreateDWordField (RBUF, IRQR._INT, IRQN) + If (PMOD) { + IRQN = IUA0 + } Else { + IRQN = PUA0 + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000) + }) + } Else { + Return (RBUF) + } + } + Method (_STA, 0x0, NotSerialized) { Return (0x0F) @@ -58,28 +97,69 @@ Device (FUR0) Device (FUR1) { Name (_HID, "AMD0020") Name (_UID, 0x1) - Name (_CRS, ResourceTemplate() - { - IRQ (Edge, ActiveHigh, Exclusive) { 11 } - Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000) - Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000) - }) + Method (_CRS, 0) { + Name (RBUF, ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Edge, + ActiveHigh, + Exclusive, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000) + }) + CreateDWordField (RBUF, IRQR._INT, IRQN) + If (PMOD) { + IRQN = IUA1 + } Else { + IRQN = PUA1 + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000) + }) + } Else { + Return (RBUF) + } + } + Method (_STA, 0x0, NotSerialized) { Return (0x0F) } } -Device (FUR2) -{ +Device (FUR2) { Name (_HID, "AMD0020") - Name (_UID, 0x0) - Name (_CRS, ResourceTemplate() - { - IRQ (Edge, ActiveHigh, Exclusive) { 15 } - Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000) - Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000) - }) + Name (_UID, 0x2) + Method (_CRS, 0) { + Name (RBUF, ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Edge, + ActiveHigh, + Exclusive, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000) + }) + CreateDWordField (RBUF, IRQR._INT, IRQN) + If (PMOD) { + IRQN = IUA2 + } Else { + IRQN = PUA2 + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000) + }) + } Else { + Return (RBUF) + } + } + Method (_STA, 0x0, NotSerialized) { Return (0x0F) @@ -88,13 +168,34 @@ Device (FUR2) Device (FUR3) { Name (_HID, "AMD0020") - Name (_UID, 0x1) - Name (_CRS, ResourceTemplate() - { - IRQ (Edge, ActiveHigh, Exclusive) { 5 } - Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000) - Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000) - }) + Name (_UID, 0x3) + Method (_CRS, 0) { + Name (RBUF, ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Edge, + ActiveHigh, + Exclusive, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000) + }) + CreateDWordField (RBUF, IRQR._INT, IRQN) + If (PMOD) { + IRQN = IUA3 + } Else { + IRQN = PUA3 + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000) + }) + } Else { + Return (RBUF) + } + } + Method (_STA, 0x0, NotSerialized) { Return (0x0F) @@ -104,11 +205,30 @@ Device (FUR3) { Device (I2C2) { Name (_HID, "AMD0010") Name (_UID, 0x2) - Name (_CRS, ResourceTemplate() - { - IRQ (Edge, ActiveHigh, Exclusive) { 4 } - Memory32Fixed (ReadWrite, APU_I2C2_BASE, 0x1000) - }) + Method (_CRS, 0) { + Name (RBUF, ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Edge, + ActiveHigh, + Exclusive, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, APU_I2C2_BASE, 0x1000) + }) + CreateDWordField (RBUF, IRQR._INT, IRQN) + If (PMOD) { + IRQN = II22 + } Else { + IRQN = PI22 + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, APU_I2C2_BASE, 0x1000) + }) + } Else { + Return (RBUF) + } + } Method (_STA, 0x0, NotSerialized) { @@ -120,24 +240,64 @@ Device (I2C3) { Name (_HID, "AMD0010") Name (_UID, 0x3) - Name (_CRS, ResourceTemplate() { - IRQ (Edge, ActiveHigh, Exclusive) { 6 } - Memory32Fixed(ReadWrite, APU_I2C3_BASE, 0x1000) - }) + Method (_CRS, 0) { + Name (RBUF, ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Edge, + ActiveHigh, + Exclusive, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, APU_I2C3_BASE, 0x1000) + }) + CreateDWordField (RBUF, IRQR._INT, IRQN) + If (PMOD) { + IRQN = II23 + } Else { + IRQN = PI23 + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, APU_I2C3_BASE, 0x1000) + }) + } Else { + Return (RBUF) + } + } Method (_STA, 0x0, NotSerialized) { Return (0x0F) } } -Device (I2C4) -{ +Device (I2C4) { Name (_HID, "AMD0010") Name (_UID, 0x4) - Name (_CRS, ResourceTemplate() { - IRQ (Edge, ActiveHigh, Exclusive) { 14 } - Memory32Fixed(ReadWrite, APU_I2C4_BASE, 0x1000) - }) + Method (_CRS, 0) { + Name (RBUF, ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Edge, + ActiveHigh, + Exclusive, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, APU_I2C4_BASE, 0x1000) + }) + CreateDWordField (RBUF, IRQR._INT, IRQN) + If (PMOD) { + IRQN = II24 + } Else { + IRQN = PI24 + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, APU_I2C4_BASE, 0x1000) + }) + } Else { + Return (RBUF) + } + } + Method (_STA, 0x0, NotSerialized) { Return (0x0F) @@ -149,7 +309,7 @@ Device (MISC) Name (_HID, "AMD0040") Name (_UID, 0x3) Name (_CRS, ResourceTemplate() { - Memory32Fixed(ReadWrite, ACPIMMIO_MISC_BASE, 0x100) + Memory32Fixed (ReadWrite, ACPIMMIO_MISC_BASE, 0x100) }) Method (_STA, 0x0, NotSerialized) { |