diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-07-16 15:18:00 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-08-09 20:24:59 +0000 |
| commit | 34c30565b0ef3b1ff79943768ecc2f4012bf6b86 (patch) | |
| tree | dcf063fd97bba7206fed1656eb50171db01287ee /src/soc/amd/picasso/acpi.c | |
| parent | 0bd0806d2f8158cf43f52fc3106fc759bd6c4a94 (diff) | |
soc/amd/picasso: Update CPU support
Change the Stoney Ridge ID to Picasso. Rename family 15h. Get the
number of cores/threads from CPUID as all D18 registers are new.
Change-Id: I44c45db637897f6caf320032c9f79a3a1ab4d6c9
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34421
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/picasso/acpi.c')
| -rw-r--r-- | src/soc/amd/picasso/acpi.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 5f897fe29d..cc06496326 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -32,6 +32,7 @@ #include <amdblocks/acpi.h> #include <soc/acpi.h> #include <soc/pci_devs.h> +#include <soc/cpu.h> #include <soc/southbridge.h> #include <soc/northbridge.h> #include <soc/nvs.h> @@ -238,10 +239,7 @@ void generate_cpu_entries(struct device *device) { int cores, cpu; - /* Picasso is single node, just report # of cores */ - cores = pci_read_config32(SOC_NB_DEV, NB_CAPABILITIES2) & CMP_CAP_MASK; - cores++; /* number of cores is CmpCap+1 */ - + cores = get_cpu_count(); printk(BIOS_DEBUG, "ACPI \\_PR report %d core(s)\n", cores); /* Generate BSP \_PR.P000 */ |