diff options
author | Martin Roth <gaumless@gmail.com> | 2023-01-04 21:27:06 -0700 |
---|---|---|
committer | Martin L Roth <gaumless@gmail.com> | 2023-01-12 03:13:17 +0000 |
commit | 20646cdbe80737e3a931dec70a8279163b2a9d60 (patch) | |
tree | 54a14680804d1cb8cbd0d2000dd0b3ec8319945b /src/soc/amd/phoenix/gpio.c | |
parent | ba2cef5b54938cce17871143ea9bbd3fc6868971 (diff) |
soc/amd: Change Morgana codename to Phoenix
Now that the next generation of APUs is officially announced, we can
unmask morgana.
The chip formerly known as Morgana is actually Phoenix.
Surprise!
This patch just changes the name across the entire codebase.
Note that the fw.cfg file will stay pointing to the
3rdparty/amd_blobs/morgana/psp directory until the amd_blobs_repo is
updated.
Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Change-Id: Ie9492a30ae9ff9cd7e15e0f2d239c32190ad4956
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71731
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/phoenix/gpio.c')
-rw-r--r-- | src/soc/amd/phoenix/gpio.c | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/src/soc/amd/phoenix/gpio.c b/src/soc/amd/phoenix/gpio.c new file mode 100644 index 0000000000..74eecadcce --- /dev/null +++ b/src/soc/amd/phoenix/gpio.c @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/gpio.h> +#include <soc/gpio.h> +#include <types.h> + +/* see the IOMUX function table for the mapping from GPIO number to GEVENT number */ +static const struct soc_amd_event gpio_event_table[] = { + { GPIO_0, GEVENT_21 }, /* GPIO0 may only be used as PWR_BTN_L in ACPI */ + { GPIO_1, GEVENT_19 }, + { GPIO_2, GEVENT_8 }, + { GPIO_3, GEVENT_2 }, + { GPIO_4, GEVENT_4 }, + { GPIO_5, GEVENT_7 }, + { GPIO_6, GEVENT_10 }, + { GPIO_7, GEVENT_11 }, + { GPIO_8, GEVENT_23 }, + { GPIO_9, GEVENT_22 }, + { GPIO_11, GEVENT_5 }, + { GPIO_16, GEVENT_12 }, + { GPIO_17, GEVENT_13 }, + { GPIO_18, GEVENT_14 }, + { GPIO_22, GEVENT_3 }, + { GPIO_23, GEVENT_16 }, + { GPIO_24, GEVENT_15 }, + { GPIO_29, GEVENT_9 }, + { GPIO_32, GEVENT_17 }, + { GPIO_40, GEVENT_20 }, + { GPIO_84, GEVENT_18 }, + { GPIO_89, GEVENT_0 }, + { GPIO_90, GEVENT_1 }, + { GPIO_91, GEVENT_6 }, +}; + +void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items) +{ + *table = gpio_event_table; + *items = ARRAY_SIZE(gpio_event_table); +} |