diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2024-01-25 18:53:54 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-26 18:12:11 +0000 |
| commit | a4a2a4f033dc48a0a24d54f34364dd2ded627699 (patch) | |
| tree | 267bf0d3f47cbd01cb884718a18e9532e0328c0d /src/soc/amd/mendocino | |
| parent | 3ac92e972d9c9c2ee113ea60eb1c3c5b0a61175a (diff) | |
soc/amd: factor out common acpi_add_ivrs_table implementation
Instead of open-coding this functionality in all AMD SoCs, factor it out
into a common implementation.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Idb65c398b747e70ec67107e0a1d4bd6551501347
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80208
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/mendocino')
| -rw-r--r-- | src/soc/amd/mendocino/agesa_acpi.c | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/src/soc/amd/mendocino/agesa_acpi.c b/src/soc/amd/mendocino/agesa_acpi.c index d60a79d51f..1e4d6005e7 100644 --- a/src/soc/amd/mendocino/agesa_acpi.c +++ b/src/soc/amd/mendocino/agesa_acpi.c @@ -12,8 +12,6 @@ uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, acpi_rsdp_t *rsdp) { - acpi_ivrs_t *ivrs; - /* TODO: look into adding CRAT */ /* add ALIB SSDT from HOB */ @@ -21,11 +19,7 @@ uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current current = add_agesa_fsp_acpi_table(AMD_FSP_ACPI_ALIB_HOB_GUID, "ALIB", rsdp, current); /* IVRS */ - current = acpi_align_current(current); - ivrs = (acpi_ivrs_t *)current; - acpi_create_ivrs(ivrs, acpi_fill_ivrs); - current += ivrs->header.length; - acpi_add_table(rsdp, ivrs); + current = acpi_add_ivrs_table(current, rsdp); return current; } |