diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2022-11-29 17:54:18 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-08 17:57:41 +0000 |
| commit | 7969a5c1b46ba73dce96b3dbd302d59f20331a81 (patch) | |
| tree | fea9634b8168a545fa24ddd2a0ade840bb7526e0 /src/soc/amd/mendocino | |
| parent | cc846838b6cd512a34ba8c872ee95c2dd5499e87 (diff) | |
vc/amd/fsp/mendocino/FspmUpd: don't use pointers for usb_phy config
The size of a pointer changes between a 32 and 64 bit coreboot build. In
order to be able to use a 32 bit FSP in a 64 bit coreboot build, change
the pointer in the UPDs to a uint32_t to always have a 32 bit field in
the UPD for this.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I419fef73d2881e323487bc7fe641b2ac4041cb17
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70135
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/mendocino')
| -rw-r--r-- | src/soc/amd/mendocino/fsp_m_params.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/soc/amd/mendocino/fsp_m_params.c b/src/soc/amd/mendocino/fsp_m_params.c index 8cbea5d6a5..d6eae9a7be 100644 --- a/src/soc/amd/mendocino/fsp_m_params.c +++ b/src/soc/amd/mendocino/fsp_m_params.c @@ -6,6 +6,7 @@ #include <amdblocks/ioapic.h> #include <amdblocks/memmap.h> #include <assert.h> +#include <console/console.h> #include <console/uart.h> #include <device/device.h> #include <fsp/api.h> @@ -157,9 +158,15 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) lcl_usb_phy.Version_Major = FSP_USB_STRUCT_MAJOR_VERSION; lcl_usb_phy.Version_Minor = FSP_USB_STRUCT_MINOR_VERSION; lcl_usb_phy.TableLength = sizeof(struct usb_phy_config); - mcfg->usb_phy = &lcl_usb_phy; + if ((uintptr_t)&lcl_usb_phy <= UINT32_MAX) { + mcfg->usb_phy_ptr = (uint32_t)(uintptr_t)&lcl_usb_phy; + } else { + printk(BIOS_ERR, "USB PHY config struct above 4GB; can't pass USB PHY " + "configuration to 32 bit FSP.\n"); + mcfg->usb_phy_ptr = 0; + } } else { - mcfg->usb_phy = NULL; + mcfg->usb_phy_ptr = 0; } fsp_fill_pcie_ddi_descriptors(mcfg); |