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authorShelley Chen <shchen@google.com>2023-12-21 10:36:18 -0800
committerNick Vaccaro <nvaccaro@google.com>2023-12-22 00:48:48 +0000
commit5fc070a6e67b9dbbd38c4cdae243f782aaa2c407 (patch)
tree50e235b84a92972ae9d4fbd203c35c45e79fbecc /src/soc/amd/mendocino/root_complex.c
parent3ced07139612ee893c670f347b28399dfbb5f1c5 (diff)
mb/google/brox: Fix config errors with 8 GPIOs
Some GPIOs were not configured correctly according to the HW spreadsheet provided by the HW team. * GPP_B5/GPP_B6 use NF1, not NF2 * GPP_B23 should use NF2, no GPI * GPP_D11 should be set to NC * GPP_E21/22 should be using NF (previous NC) * GPP_F17 is a GPO * GPP_F18 should be an interrupt, not a NF BUG=b:300690448,b:316180020 BRANCH=NONE TEST=emerge-brox coreboot Change-Id: I9e1e62adb79bd7fdab935afdbf2d23f9061b88aa Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79705 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/amd/mendocino/root_complex.c')
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