summaryrefslogtreecommitdiff
path: root/src/soc/amd/mendocino/root_complex.c
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2024-01-31 12:17:58 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-02-02 20:40:20 +0000
commit416cc665929e4e66bcab3e395daa031401a61fe8 (patch)
tree33a0ea5ec6151cd1f4b876ca2091ff9d07eb4b07 /src/soc/amd/mendocino/root_complex.c
parent0b76f02892ba37eceff4340c2ca8c4da3f721f9f (diff)
soc/amd: commonize PCI root IOAPIC initialization
Make the initialization of the IOAPIC(s) in the PCI root(s) common across all AMD family 17h+ SoCs. For this the more general implementation from the Genoa code that supports multiple PC roots is moved to the common AMD code. All other family 17h+ SoCs are then adapted to use the common code. For those non-Genoa SoCs, the initialization of this second IOAPIC is moved from the northbridge device to the domain device above to match Genoa. Test=Both the FCH IOAPIC and the PCIe root IOAPIC are still initialized on Mandolin Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I7c0ec6ac2f11cb11e46248cceec96c1fd2a49c16 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80286 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/mendocino/root_complex.c')
-rw-r--r--src/soc/amd/mendocino/root_complex.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/soc/amd/mendocino/root_complex.c b/src/soc/amd/mendocino/root_complex.c
index 3247eb48f4..217983331f 100644
--- a/src/soc/amd/mendocino/root_complex.c
+++ b/src/soc/amd/mendocino/root_complex.c
@@ -85,11 +85,6 @@ struct dptc_input {
}, \
}
-static void root_complex_init(struct device *dev)
-{
- register_new_ioapic((u8 *)GNB_IO_APIC_ADDR);
-}
-
static void acipgen_dptci(void)
{
const struct soc_amd_mendocino_config *config = config_of_soc();
@@ -267,7 +262,6 @@ struct device_operations mendocino_root_complex_operations = {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.enable_resources = pci_dev_enable_resources,
- .init = root_complex_init,
.acpi_name = gnb_acpi_name,
.acpi_fill_ssdt = root_complex_fill_ssdt,
};