diff options
author | Jon Murphy <jpmurphy@google.com> | 2022-08-05 15:43:44 -0600 |
---|---|---|
committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-08-11 19:15:30 +0000 |
commit | 4f732420526fdc1c969e910daca573dca72d7b82 (patch) | |
tree | 26c74fa55c89edbdd7c36be5b966401910437694 /src/soc/amd/mendocino/bootblock.c | |
parent | 251e26683e25fdbef329e9e731319ef95b0f7327 (diff) |
treewide: Rename Sabrina to Mendocino
'Mendocino' was an embargoed name and could previously not be used
in references to Skyrim. coreboot has references to sabrina both
in directory structure and in files. This will make life difficult
for people looking for Mendocino support in the long term. The code
name should be replaced with "mendocino".
BUG=b:239072117
TEST=Builds
Cq-Depend: chromium:3764023
Cq-Depend: chromium:3763392
Cq-Depend: chrome-internal:4876777
Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I2d0f76fde07a209a79f7e1596cc8064e53f06ada
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65861
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/mendocino/bootblock.c')
-rw-r--r-- | src/soc/amd/mendocino/bootblock.c | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/src/soc/amd/mendocino/bootblock.c b/src/soc/amd/mendocino/bootblock.c new file mode 100644 index 0000000000..bbf56d360a --- /dev/null +++ b/src/soc/amd/mendocino/bootblock.c @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* TODO: Check if this is still correct */ + +#include <amdblocks/amd_pci_mmconf.h> +#include <amdblocks/cpu.h> +#include <bootblock_common.h> +#include <console/console.h> +#include <cpu/x86/tsc.h> +#include <soc/southbridge.h> +#include <soc/psp_transfer.h> +#include <stdint.h> + +asmlinkage void bootblock_c_entry(uint64_t base_timestamp) +{ + early_cache_setup(); + write_resume_eip(); + enable_pci_mmconf(); + + /* + * base_timestamp is raw tsc value. We need to divide by tsc_freq_mhz + * to get micro-seconds granularity. + */ + base_timestamp /= tsc_freq_mhz(); + + if (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) + boot_with_psp_timestamp(base_timestamp); + + /* + * if VBOOT_STARTS_BEFORE_BOOTBLOCK is not selected or + * previous step did nothing, proceed with normal bootblock main. + */ + bootblock_main_with_basetime(base_timestamp); +} + +void bootblock_soc_early_init(void) +{ + fch_pre_init(); +} + +void bootblock_soc_init(void) +{ + u32 val = cpuid_eax(1); + printk(BIOS_DEBUG, "Family_Model: %08x\n", val); + + if (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) { + verify_psp_transfer_buf(); + show_psp_transfer_info(); + } + + fch_early_init(); +} |