diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2024-02-18 12:31:13 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-02-21 13:47:31 +0000 |
| commit | 3f06e6c74089a1dffcf9340890c7b5bb10ea2119 (patch) | |
| tree | 0ce07510750f81d3fd531c144568972d56ab4ffb /src/soc/amd/mendocino/acpi/soc.asl | |
| parent | d6e287f41055e8893da6c6b663f60913a878ee92 (diff) | |
mb/google/volteer: Disable PM ACPI timer to fix S0i3 regression
Keeping the PM timer enabled will disqualify an ADL system from entering
S0i3, and will also cause an increase in power during suspend states.
The PM timer is not required for brya boards, therefore disabling it.
Fixes: 0e90580 (soc/intel: transition full control over PM Timer from
FSP to coreboot)
This mirrors an identical commit for google/brya: 1ce0f3aab72d
("mb/google/brya: Fix S0i3 regression")
TEST=Boot Linux on google/drobit, verify S0i3 counter incrementing after
exiting S0ix suspend states.
Change-Id: I644e42388c0f6127512bf52e774b79721601ecc9
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80612
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/mendocino/acpi/soc.asl')
0 files changed, 0 insertions, 0 deletions