diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-01-20 23:37:51 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-06 12:13:15 +0000 |
| commit | b01f74ae3efcbb592c342c86c819a9f46bab6949 (patch) | |
| tree | 43885f3928797299d33fbf2c6e4d427a59d06c27 /src/soc/amd/mendocino/acpi/globalnvs.asl | |
| parent | 8b42a24d036fb6f5fc15a25f8d3d25f6fe6bd060 (diff) | |
soc/amd/mendocino: remove LIDS field from global NVS
Since the LIDS field is only used in the ACPI code and not in the C code
of any mainboard using the Mendocino SoC, remove it form the global NVS
and add an ACPI object for this in the DSDT of the mainboards that use
it in their ACPI code.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I1ed0407826f579eb14169246b7b14ba677c20e8d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72185
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/mendocino/acpi/globalnvs.asl')
| -rw-r--r-- | src/soc/amd/mendocino/acpi/globalnvs.asl | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/soc/amd/mendocino/acpi/globalnvs.asl b/src/soc/amd/mendocino/acpi/globalnvs.asl index 7aa5de39da..4161e5fdf9 100644 --- a/src/soc/amd/mendocino/acpi/globalnvs.asl +++ b/src/soc/amd/mendocino/acpi/globalnvs.asl @@ -8,8 +8,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ - LIDS, 8, // 0x00 - LID State - CBMC, 32, // 0x01 - 0x04 - coreboot Memory Console - PM1I, 64, // 0x05 - 0x0c - System Wake Source - PM1 Index - GPEI, 64, // 0x0d - 0x14 - GPE Wake Source + CBMC, 32, // 0x00 - 0x03 - coreboot Memory Console + PM1I, 64, // 0x04 - 0x0b - System Wake Source - PM1 Index + GPEI, 64, // 0x0c - 0x13 - GPE Wake Source } |