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authorTim Van Patten <timvp@google.com>2022-08-23 16:06:33 -0600
committerFelix Held <felix-coreboot@felixheld.de>2022-09-12 12:21:01 +0000
commit9244358536aaecff29453b1693fdf202091878ef (patch)
tree4b8136239b03292ffb6d6171af19ca3343a36acf /src/soc/amd/mendocino/Kconfig
parent14bed61ba160093003613fc210b3e6b7af15d964 (diff)
soc/amd: Refactor DPTC Tablet Mode
Refactor AMD DPTC tablet mode in preparation for adding low/no battery DPTC settings. 1. Refactor and simplify acpigen_write_alib_dptc() into the following functions: - acpigen_write_alib_dptc_default() - acpigen_write_alib_dptc_tablet() 2. Add device tree register value dptc_tablet_mode_enable to control whether DPTC tablet mode is enabled for a variant. 3. Add dptc.asl to perform the necessary ACPI checking before modifying the DPTC settings. BRANCH=none BUG=b:217911928 TEST=Build zork TEST=Build nipperkin TEST=Boot skyrim Change-Id: I2518fdd526868c9d5668a6018fd3570392e809c0 Signed-off-by: Tim Van Patten <timvp@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66994 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/amd/mendocino/Kconfig')
-rw-r--r--src/soc/amd/mendocino/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig
index d0ce78b29b..7155aaba0a 100644
--- a/src/soc/amd/mendocino/Kconfig
+++ b/src/soc/amd/mendocino/Kconfig
@@ -52,7 +52,7 @@ config SOC_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_ACP_GEN2
select SOC_AMD_COMMON_BLOCK_ACPI # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
- select SOC_AMD_COMMON_BLOCK_ACPI_ALIB # TODO: Check if this is still correct
+ select SOC_AMD_COMMON_BLOCK_ACPI_ALIB
select SOC_AMD_COMMON_BLOCK_ACPI_CPPC
select SOC_AMD_COMMON_BLOCK_ACPI_GPIO
select SOC_AMD_COMMON_BLOCK_ACPI_IVRS # TODO: Check if this is still correct