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authorMartin Roth <gaumless@gmail.com>2023-02-01 14:27:18 -0700
committerFelix Held <felix-coreboot@felixheld.de>2023-02-04 03:23:04 +0000
commit440c8236757de32c6cfd41ef67696f9f09992986 (patch)
treec084c1d1725221cde44ef2c03ddd5b1d74de066a /src/soc/amd/mendocino/Kconfig
parentc46c15b5920bf8378c333f862a8f5766cf104c85 (diff)
soc/amd: Use common reset code for CZN & MDN SoCs
This switches the Cezanne & Mendocino SoCs to use the common reset code. This patch does not change any behavior on those chips. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ie05c790573e4e68f3ec91bacffcc7d7efb986d79 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72659 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/mendocino/Kconfig')
-rw-r--r--src/soc/amd/mendocino/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig
index 7faa479363..5b274f90fd 100644
--- a/src/soc/amd/mendocino/Kconfig
+++ b/src/soc/amd/mendocino/Kconfig
@@ -61,6 +61,7 @@ config SOC_AMD_REMBRANDT_BASE
select SOC_AMD_COMMON_BLOCK_PM
select SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE
select SOC_AMD_COMMON_BLOCK_PSP_GEN2
+ select SOC_AMD_COMMON_BLOCK_RESET
select SOC_AMD_COMMON_BLOCK_SMBUS
select SOC_AMD_COMMON_BLOCK_SMI
select SOC_AMD_COMMON_BLOCK_SMM