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authorJohnny Lin <johnny_lin@wiwynn.com>2022-03-29 22:44:47 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-12-20 19:53:42 +0000
commit161d090d22f9f687a328a9582b264bec734d042b (patch)
treef5ebedc716183f71884cd1414ff1e7ae4ba47e6c /src/soc/amd/mendocino/Kconfig
parent57789db4d218c7eee4e745ec46c2228eadb57846 (diff)
soc/intel/xeon_sp: Set IA32_SMRR_PHYSMASK lock bit
smm_relocation_handler is run for each thread but IA32_SMRR_PHYS_BASE and IA32_SMRR_PHYS_MASK are core scope, need to avoid writing the same MSR that has been locked by another thread. Tested=On OCP Crater Lake, rdmsr -a 0x1f3 can see all cores set the lock bit. Change-Id: I9cf5a6761c9a9e1578c6132ef83e288540d41176 Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70870 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Diffstat (limited to 'src/soc/amd/mendocino/Kconfig')
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