diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-05-31 16:25:30 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-06-07 00:20:59 +0000 |
| commit | b56ea2503f77f8c9962c55e65447030e657408f7 (patch) | |
| tree | 89b9b999a9bd8b46ef7ea3927ea3d45d6850d7d5 /src/soc/amd/glinda/root_complex.c | |
| parent | 268dadbcc6285a01fc7348ea1fdf58fadbab3530 (diff) | |
soc/amd/glinda/chip: use common data fabric domain resource code
Use the new common AMD code that gets the usable non-fixed MMIO windows
from the data fabric MMIO decode registers and generate the PCI0 _CRS
ACPI code based on those regions. For a more detailed description see
the corresponding patch that changes the Picasso code to use this new
code. In contrast to the Picasso code, this change will drop the
unneeded _STA method inside the PCI0 scope which wasn't present in
Picasso's ACPI code before it got replaced by the SSDT that gets
generated by amd_pci_domain_fill_ssdt.
TEST=None
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I948d882b2e2c6d19f73c0be094e4ff6e42ec81d6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75560
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/amd/glinda/root_complex.c')
| -rw-r--r-- | src/soc/amd/glinda/root_complex.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/glinda/root_complex.c b/src/soc/amd/glinda/root_complex.c index 9cb758a4cc..071903d3c6 100644 --- a/src/soc/amd/glinda/root_complex.c +++ b/src/soc/amd/glinda/root_complex.c @@ -220,7 +220,6 @@ static void acipgen_dptci(void) static void root_complex_fill_ssdt(const struct device *device) { - acpi_fill_root_complex_tom(device); if (CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC)) acipgen_dptci(); } |