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author | Felix Held <felix-coreboot@felixheld.de> | 2024-05-17 21:43:56 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2024-05-22 15:45:17 +0000 |
commit | 27cb75a075c39d43bcaecc95fe05d492fe2f896f (patch) | |
tree | 7bd23d7d4d8e0e970ffd238943e40481c9bfa593 /src/soc/amd/glinda/chip.c | |
parent | abcbd5b998b4a9f5f27c356655f439e817f3bcc5 (diff) |
soc/amd/phoenix/chip.h: add DDI configuration for openSIL
In the FSP case, the DDI descriptors aren't part of the devicetree and
are instead retrieved in romstage by calling the mainboard's
mainboard_get_dxio_ddi_descriptors function which allows updating the
descriptors during romstage where the devicetree is static. In the
openSIL case, the DDI configuration is first needed in ramstage, so we
can put this info into the devicetree and update it if needed in
ramstage.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I3de12ff6af42e38751a3016efa313613677fa87a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82580
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/glinda/chip.c')
0 files changed, 0 insertions, 0 deletions