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authorMartin Roth <gaumless@gmail.com>2023-02-08 14:26:02 -0700
committerFelix Held <felix-coreboot@felixheld.de>2023-02-10 17:09:04 +0000
commit9ceac74a51e5c46c5bdec1e295a31dd78ff62a21 (patch)
tree02a7a0f163293500a4c3f659630bd3bd1f76c008 /src/soc/amd/glinda/Kconfig
parente5e82862627eaf6d7edeb29af8b5c71d628e8c3c (diff)
soc/amd(MDN/PHX/Glinda): Update DISABLE_KEYBOARD_RESET_PIN help
For MDN, PHX, & Glinda platforms, the Keyboard Reset functionality has been moved from GPIO 129 to GPIO 21. Additionally, the issue where the system would reset when the KBDRST_L pin went low even when not configured for Keyboard reset seems to have been fixed, so remove that text. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Iefe7e00d63777577b59ee98cb974b07afea1fd12 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72912 Reviewed-by: Jon Murphy <jpmurphy@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/glinda/Kconfig')
-rw-r--r--src/soc/amd/glinda/Kconfig5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig
index 214fc81b7b..f9dee4288a 100644
--- a/src/soc/amd/glinda/Kconfig
+++ b/src/soc/amd/glinda/Kconfig
@@ -296,10 +296,7 @@ config DISABLE_SPI_FLASH_ROM_SHARING
config DISABLE_KEYBOARD_RESET_PIN
bool
help
- Instruct the SoC to not use the state of GPIO_129 as keyboard reset
- signal. When this pin is used as GPIO and the keyboard reset
- functionality isn't disabled, configuring it as an output and driving
- it as 0 will cause a reset.
+ Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L.
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"