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authorFelix Held <felix-coreboot@felixheld.de>2024-01-26 14:22:31 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-01-27 16:38:54 +0000
commitd9e826322031f5936231be44e3b2c406be40a304 (patch)
tree5721ca69716d2c0d7ecdf28dcce0e42a4e1e3386 /src/soc/amd/genoa_poc
parent3aaf8efdfad7081fa39a679f2f6d28a176c3a005 (diff)
soc/amd/*/acpi: use common soc_acpi_write_tables prototype
Since the definition is the same for all SoCs, move it to the common amdblock/acpi.h header. Since the Stoneyridge northbridge.c file also includes this prototype, remove the static attribute of the function there. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ib9aa215f2b4ba58f43fed2c751d989f1719e0a17 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80221 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/genoa_poc')
-rw-r--r--src/soc/amd/genoa_poc/chip.c2
-rw-r--r--src/soc/amd/genoa_poc/include/soc/acpi.h6
2 files changed, 1 insertions, 7 deletions
diff --git a/src/soc/amd/genoa_poc/chip.c b/src/soc/amd/genoa_poc/chip.c
index 5f29428955..83d2bc9fa6 100644
--- a/src/soc/amd/genoa_poc/chip.c
+++ b/src/soc/amd/genoa_poc/chip.c
@@ -1,8 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <amdblocks/acpi.h>
#include <device/device.h>
#include <soc/southbridge.h>
-#include <soc/acpi.h>
#include <soc/southbridge.h>
#include <vendorcode/amd/opensil/genoa_poc/opensil.h>
diff --git a/src/soc/amd/genoa_poc/include/soc/acpi.h b/src/soc/amd/genoa_poc/include/soc/acpi.h
index 082386fe61..a2a9f39732 100644
--- a/src/soc/amd/genoa_poc/include/soc/acpi.h
+++ b/src/soc/amd/genoa_poc/include/soc/acpi.h
@@ -3,12 +3,6 @@
#ifndef AMD_GENOA_POC_ACPI_H
#define AMD_GENOA_POC_ACPI_H
-#include <acpi/acpi.h>
-#include <device/device.h>
-
#define ACPI_SCI_IRQ 9
-unsigned long soc_acpi_write_tables(const struct device *device, unsigned long current,
- struct acpi_rsdp *rsdp);
-
#endif /* AMD_GENOA_POC_ACPI_H */