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authorFelix Held <felix-coreboot@felixheld.de>2022-10-14 22:59:40 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-10-17 13:43:25 +0000
commitde10d5bf4dbf200c40ae218f5b2327e8e06c6749 (patch)
tree9ee734a4cf4ab5b529612fe983f250ec3b7c96ab /src/soc/amd/common
parentf73a3a5e08d7906e4ce1152a820ac52a3547a842 (diff)
soc/amd: factor out common noncar bootblock
This code is identical for all non-CAR AMD SoCs, so factor it out to soc/amd/common/block/cpu/noncar/bootblock.c to avoid code duplication. Also integrate the bootblock.c improvement to include cpu/cpu.h which provides cpuid_eax from commit 68eb439d8091 ("soc/amd/picasso: Clean up includes"). Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I42e4aa85efd6312a3ab37f0323a35f6dd7acd8e6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68431 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/common')
-rw-r--r--src/soc/amd/common/block/cpu/noncar/Makefile.inc1
-rw-r--r--src/soc/amd/common/block/cpu/noncar/bootblock.c51
2 files changed, 52 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/cpu/noncar/Makefile.inc b/src/soc/amd/common/block/cpu/noncar/Makefile.inc
index 2ffe52b361..2de2695b55 100644
--- a/src/soc/amd/common/block/cpu/noncar/Makefile.inc
+++ b/src/soc/amd/common/block/cpu/noncar/Makefile.inc
@@ -1,5 +1,6 @@
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_NONCAR),y)
+bootblock-y += bootblock.c
bootblock-y += early_cache.c
bootblock-y += pre_c.S
bootblock-y += write_resume_eip.c
diff --git a/src/soc/amd/common/block/cpu/noncar/bootblock.c b/src/soc/amd/common/block/cpu/noncar/bootblock.c
new file mode 100644
index 0000000000..13bac18714
--- /dev/null
+++ b/src/soc/amd/common/block/cpu/noncar/bootblock.c
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <amdblocks/amd_pci_mmconf.h>
+#include <amdblocks/cpu.h>
+#include <bootblock_common.h>
+#include <console/console.h>
+#include <cpu/cpu.h>
+#include <cpu/x86/tsc.h>
+#include <soc/southbridge.h>
+#include <soc/psp_transfer.h>
+#include <stdint.h>
+
+asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
+{
+ early_cache_setup();
+ write_resume_eip();
+ enable_pci_mmconf();
+
+ /*
+ * base_timestamp is raw tsc value. We need to divide by tsc_freq_mhz
+ * to get micro-seconds granularity.
+ */
+ base_timestamp /= tsc_freq_mhz();
+
+ if (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK))
+ boot_with_psp_timestamp(base_timestamp);
+
+ /*
+ * if VBOOT_STARTS_BEFORE_BOOTBLOCK is not selected or
+ * previous step did nothing, proceed with normal bootblock main.
+ */
+ bootblock_main_with_basetime(base_timestamp);
+}
+
+void bootblock_soc_early_init(void)
+{
+ fch_pre_init();
+}
+
+void bootblock_soc_init(void)
+{
+ u32 val = cpuid_eax(1);
+ printk(BIOS_DEBUG, "Family_Model: %08x\n", val);
+
+ if (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) {
+ verify_psp_transfer_buf();
+ show_psp_transfer_info();
+ }
+
+ fch_early_init();
+}