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authorNikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>2021-06-25 11:15:38 -0500
committerWerner Zeh <werner.zeh@siemens.com>2021-06-30 04:47:13 +0000
commitc839b3704987a187afc2db5bc0b44b9523486308 (patch)
tree5116597284c35e8d0e9203d4a7b1e11389c1fc67 /src/soc/amd/common
parent5f406d9cb39ba6fd9e5e5c581277b5b03490fd4c (diff)
soc/amd/common/fsp/dmi.c: Fix Type 17 DMI reporting
With two versions of *speed_mhz_to_reported_mts() we need to call the correct one based on the reported memory type. BUG=b:184124605 TEST="dmidecode --type 17" in OS on Guybrush Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com> Change-Id: I92e834097546e3ef7130830444a80f818bdea3d5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55852 Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common')
-rw-r--r--src/soc/amd/common/fsp/dmi.c22
1 files changed, 20 insertions, 2 deletions
diff --git a/src/soc/amd/common/fsp/dmi.c b/src/soc/amd/common/fsp/dmi.c
index b3eb5746db..61d43f7aae 100644
--- a/src/soc/amd/common/fsp/dmi.c
+++ b/src/soc/amd/common/fsp/dmi.c
@@ -15,6 +15,23 @@
#include <dimm_info_util.h>
#include <dmi_info.h>
#include <device/dram/ddr4.h>
+#include <device/dram/lpddr4.h>
+
+/**
+ * Convert DDR clock speed (based on memory type) in MHz to the standard reported speed in MT/s
+ */
+static uint16_t ddr_speed_mhz_to_reported_mts(uint16_t ddr_type, uint16_t speed)
+{
+ switch (ddr_type) {
+ case MEMORY_TYPE_DDR4:
+ return ddr4_speed_mhz_to_reported_mts(speed);
+ case MEMORY_TYPE_LPDDR4:
+ return lpddr4_speed_mhz_to_reported_mts(speed);
+ default:
+ printk(BIOS_ERR, "ERROR: Unknown memory type %x", ddr_type);
+ return 0;
+ }
+}
/**
* Populate dimm_info using AGESA TYPE17_DMI_INFO.
@@ -28,9 +45,10 @@ static void transfer_memory_info(const TYPE17_DMI_INFO *dmi17,
dimm->ddr_type = dmi17->MemoryType;
- dimm->configured_speed_mts = ddr4_speed_mhz_to_reported_mts(dmi17->ConfigSpeed);
+ dimm->configured_speed_mts = ddr_speed_mhz_to_reported_mts(
+ dmi17->MemoryType, dmi17->ConfigSpeed);
- dimm->max_speed_mts = ddr4_speed_mhz_to_reported_mts(dmi17->Speed);
+ dimm->max_speed_mts = ddr_speed_mhz_to_reported_mts(dmi17->MemoryType, dmi17->Speed);
dimm->rank_per_dimm = dmi17->Attributes;