diff options
author | Tim Van Patten <timvp@google.com> | 2022-08-23 16:06:33 -0600 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-12 12:21:01 +0000 |
commit | 9244358536aaecff29453b1693fdf202091878ef (patch) | |
tree | 4b8136239b03292ffb6d6171af19ca3343a36acf /src/soc/amd/common | |
parent | 14bed61ba160093003613fc210b3e6b7af15d964 (diff) |
soc/amd: Refactor DPTC Tablet Mode
Refactor AMD DPTC tablet mode in preparation for adding low/no battery
DPTC settings.
1. Refactor and simplify acpigen_write_alib_dptc() into the following
functions:
- acpigen_write_alib_dptc_default()
- acpigen_write_alib_dptc_tablet()
2. Add device tree register value dptc_tablet_mode_enable to control
whether DPTC tablet mode is enabled for a variant.
3. Add dptc.asl to perform the necessary ACPI checking before modifying
the DPTC settings.
BRANCH=none
BUG=b:217911928
TEST=Build zork
TEST=Build nipperkin
TEST=Boot skyrim
Change-Id: I2518fdd526868c9d5668a6018fd3570392e809c0
Signed-off-by: Tim Van Patten <timvp@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66994
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/amd/common')
-rw-r--r-- | src/soc/amd/common/acpi/dptc.asl | 25 | ||||
-rw-r--r-- | src/soc/amd/common/block/acpi/alib.c | 64 | ||||
-rw-r--r-- | src/soc/amd/common/block/include/amdblocks/alib.h | 4 |
3 files changed, 75 insertions, 18 deletions
diff --git a/src/soc/amd/common/acpi/dptc.asl b/src/soc/amd/common/acpi/dptc.asl new file mode 100644 index 0000000000..611024cb02 --- /dev/null +++ b/src/soc/amd/common/acpi/dptc.asl @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +External(\_SB.DDEF, MethodObj) +External(\_SB.DTAB, MethodObj) + +Scope (\_SB) +{ + Method (DPTC, 0, Serialized) + { + /* If _SB.DDEF is not present, DPTC is not enabled so return early. */ + If (!CondRefOf (\_SB.DDEF)) + { + Return (Zero) + } + + If (CondRefOf (\_SB.DTAB) && (\_SB.PCI0.LPCB.EC0.TBMD == One)) + { + \_SB.DTAB() + Return (Zero) + } + + \_SB.DDEF() + Return (Zero) + } +} diff --git a/src/soc/amd/common/block/acpi/alib.c b/src/soc/amd/common/block/acpi/alib.c index 7dbb9b8407..4f6eafb320 100644 --- a/src/soc/amd/common/block/acpi/alib.c +++ b/src/soc/amd/common/block/acpi/alib.c @@ -16,28 +16,60 @@ static void acpigen_dptc_call_alib(const char *buf_name, uint8_t *buffer, size_t acpigen_emit_namestring(buf_name); } -void acpigen_write_alib_dptc(uint8_t *default_param, size_t default_param_len, - uint8_t *tablet_param, size_t tablet_param_len) +void acpigen_write_alib_dptc_default(uint8_t *default_param, size_t default_param_len) { /* Scope (\_SB) */ acpigen_write_scope("\\_SB"); - /* Method(DPTC, 0, Serialized) */ - acpigen_write_method_serialized("DPTC", 0); - - /* TODO: The code assumes that if DPTC gets called the following object exists */ - /* If (LEqual ("\_SB.PCI0.LPCB.EC0.TBMD", 1)) */ - acpigen_write_if_lequal_namestr_int("\\_SB.PCI0.LPCB.EC0.TBMD", 1); - - acpigen_dptc_call_alib("TABB", tablet_param, tablet_param_len); + /* Default (Unthrottled) Mode */ + /* Scope (\_SB) + * { + * Method (DDEF, 0, Serialized) + * { + * Debug = "DPTC: Using normal SOC DPTC Settings." + * Name (DEFB, Buffer (0x25) + * { + * ... + * }) + * \_SB.ALIB + * 0x0C + * DEFB + * } + * } + */ + acpigen_write_method_serialized("DDEF", 0); + acpigen_write_debug_string("DPTC: Using normal SOC DPTC Settings."); + acpigen_dptc_call_alib("DEFB", default_param, default_param_len); + acpigen_write_method_end(); - /* Else */ - acpigen_write_else(); + acpigen_write_scope_end(); +} - acpigen_dptc_call_alib("DEFB", default_param, default_param_len); +void acpigen_write_alib_dptc_tablet(uint8_t *tablet_param, size_t tablet_param_len) +{ + /* Scope (\_SB) */ + acpigen_write_scope("\\_SB"); - acpigen_pop_len(); /* Else */ + /* Tablet Mode */ + /* Scope (\_SB) + * { + * Method (DTAB, 0, Serialized) + * { + * Debug = "DPTC: Using tablet mode SOC DPTC Settings." + * Name (TABB, Buffer (0x25) + * { + * ... + * }) + * \_SB.ALIB + * 0x0C + * TABB + * } + * } + */ + acpigen_write_method_serialized("DTAB", 0); + acpigen_write_debug_string("DPTC: Using tablet mode SOC DPTC Settings."); + acpigen_dptc_call_alib("TABB", tablet_param, tablet_param_len); + acpigen_write_method_end(); - acpigen_pop_len(); /* Method DPTC */ - acpigen_pop_len(); /* Scope \_SB */ + acpigen_write_scope_end(); } diff --git a/src/soc/amd/common/block/include/amdblocks/alib.h b/src/soc/amd/common/block/include/amdblocks/alib.h index 8899c78eaa..6e193661bd 100644 --- a/src/soc/amd/common/block/include/amdblocks/alib.h +++ b/src/soc/amd/common/block/include/amdblocks/alib.h @@ -27,8 +27,8 @@ struct alib_dptc_param { uint32_t value; } __packed; -void acpigen_write_alib_dptc(uint8_t *default_param, size_t default_param_len, - uint8_t *tablet_param, size_t tablet_param_len); +void acpigen_write_alib_dptc_default(uint8_t *default_param, size_t default_param_len); +void acpigen_write_alib_dptc_tablet(uint8_t *tablet_param, size_t tablet_param_len); #endif /* !__ACPI__ */ |