diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-08-03 18:42:04 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-08 00:16:37 +0000 |
| commit | 85e733f0ef010e0bdeaab8e6e5790763844f805e (patch) | |
| tree | f20ab1e35f956315faff81d026df37dc61d06af0 /src/soc/amd/common | |
| parent | ad38ac01823c9d2635b396e7dcb568076230935a (diff) | |
soc/amd/common/include/acpimmio: reduce visibility of GPIO MMIO access
Introduce amdblocks/acpimmio_legacy_gpio100.h so that the old pre-SoC
chipsets can still access the raw GPIO100 and IOMUX ACPIMMIO registers
while only allowing GPIO accesses through the GPIO API on the SoCs.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I18872dfa40d53ba8b0d7802eec52ede5e2ae617a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56786
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/common')
3 files changed, 43 insertions, 23 deletions
diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c index 6f566341eb..f32558aa59 100644 --- a/src/soc/amd/common/block/gpio_banks/gpio.c +++ b/src/soc/amd/common/block/gpio_banks/gpio.c @@ -31,6 +31,16 @@ static inline void gpio_write32(gpio_t gpio_num, uint32_t value) write32(gpio_ctrl_ptr(gpio_num), value); } +static inline uint8_t iomux_read8(uint8_t reg) +{ + return read8(acpimmio_iomux + reg); +} + +static inline void iomux_write8(uint8_t reg, uint8_t value) +{ + write8(acpimmio_iomux + reg, value); +} + static uint8_t get_gpio_mux(gpio_t gpio) { return iomux_read8(gpio); diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h index bf84a2564e..c9d709b9a3 100644 --- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h +++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h @@ -272,18 +272,6 @@ static inline void smbus_write8(uint8_t reg, uint8_t value) write8(acpimmio_smbus + reg, value); } -/* These iomux_read/write8 are to be deprecated to enforce proper - use of <gpio.h> API for pin configurations. */ -static inline uint8_t iomux_read8(uint8_t reg) -{ - return read8(acpimmio_iomux + reg); -} - -static inline void iomux_write8(uint8_t reg, uint8_t value) -{ - write8(acpimmio_iomux + reg, value); -} - static inline uint8_t misc_read8(uint8_t reg) { return read8(acpimmio_misc + reg); @@ -314,17 +302,6 @@ static inline void misc_write32(uint8_t reg, uint32_t value) write32(acpimmio_misc + reg, value); } -/* Old GPIO configuration registers */ -static inline uint8_t gpio_100_read8(uint8_t reg) -{ - return read8(acpimmio_gpio_100 + reg); -} - -static inline void gpio_100_write8(uint8_t reg, uint8_t value) -{ - write8(acpimmio_gpio_100 + reg, value); -} - static inline uint8_t xhci_pm_read8(uint8_t reg) { return read8(acpimmio_xhci_pm + reg); diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio_legacy_gpio100.h b/src/soc/amd/common/block/include/amdblocks/acpimmio_legacy_gpio100.h new file mode 100644 index 0000000000..e7ef80a760 --- /dev/null +++ b/src/soc/amd/common/block/include/amdblocks/acpimmio_legacy_gpio100.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef AMD_BLOCK_ACPIMMIO_LEGACY_GPIO_100_H +#define AMD_BLOCK_ACPIMMIO_LEGACY_GPIO_100_H + +#include <amdblocks/acpimmio.h> +#include <device/mmio.h> +#include <types.h> + +/* These iomux_read/write8 are to be deprecated to enforce proper + use of <gpio.h> API for pin configurations. */ +static inline uint8_t iomux_read8(uint8_t reg) +{ + return read8(acpimmio_iomux + reg); +} + +static inline void iomux_write8(uint8_t reg, uint8_t value) +{ + write8(acpimmio_iomux + reg, value); +} + +/* Old GPIO configuration registers */ +static inline uint8_t gpio_100_read8(uint8_t reg) +{ + return read8(acpimmio_gpio_100 + reg); +} + +static inline void gpio_100_write8(uint8_t reg, uint8_t value) +{ + write8(acpimmio_gpio_100 + reg, value); +} + +#endif /* AMD_BLOCK_ACPIMMIO_LEGACY_GPIO_100_H */ |