diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2024-01-18 21:10:59 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-20 01:27:04 +0000 |
| commit | 5b94f9a663b08ff73466c0ee97594367729ae919 (patch) | |
| tree | 277c8011c404ced11ae969098536f780f747d4d5 /src/soc/amd/common | |
| parent | 931840fbcbe9bbe9cd98a4fbc26bfa45433a13c2 (diff) | |
soc/amd/*/romstage: factor out FSP-M call
Move the call into the FSP code to a file in the common AMD FSP code to
isolate the FSP-specific parts of the code and a preparation to make the
romstage of all non-CAR AMD SoCs common. Without isolating the call into
the FSP-M code, building the common romstage would fail for genoa_poc
due to fsp/api.h not being in the include path.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I30cf1bee2ec1a507dc8e61eaf44067663e2505ae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80002
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/common')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/fsp.h | 8 | ||||
| -rw-r--r-- | src/soc/amd/common/fsp/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/common/fsp/fsp_romstage.c | 10 |
3 files changed, 19 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/fsp.h b/src/soc/amd/common/block/include/amdblocks/fsp.h new file mode 100644 index 0000000000..a7b664f498 --- /dev/null +++ b/src/soc/amd/common/block/include/amdblocks/fsp.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef AMD_BLOCK_FSP_H +#define AMD_BLOCK_FSP_H + +void amd_fsp_early_init(void); + +#endif /* AMD_BLOCK_FSP_H */ diff --git a/src/soc/amd/common/fsp/Makefile.inc b/src/soc/amd/common/fsp/Makefile.inc index 14f1f8510b..2517f0c6fe 100644 --- a/src/soc/amd/common/fsp/Makefile.inc +++ b/src/soc/amd/common/fsp/Makefile.inc @@ -2,6 +2,7 @@ ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y) romstage-y += fsp_memmap.c romstage-y += fsp_reset.c +romstage-y += fsp_romstage.c romstage-y += fsp_validate.c ramstage-y += fsp_graphics.c ramstage-y += fsp_memmap.c diff --git a/src/soc/amd/common/fsp/fsp_romstage.c b/src/soc/amd/common/fsp/fsp_romstage.c new file mode 100644 index 0000000000..26778f1922 --- /dev/null +++ b/src/soc/amd/common/fsp/fsp_romstage.c @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> +#include <amdblocks/fsp.h> +#include <fsp/api.h> + +void amd_fsp_early_init(void) +{ + fsp_memory_init(acpi_is_wakeup_s3()); +} |