diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2021-07-23 19:18:02 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-07-26 19:34:20 +0000 |
commit | 3136424e48b533a29258d5b2412439db066ff744 (patch) | |
tree | 62866c609208c8418500d47448698a7179a8106a /src/soc/amd/common | |
parent | ee3d09b48ed572df059de50537e6ba0e4afbfbf1 (diff) |
soc/amd/common/block/acpimmio: add Kconfig option for biosram accessors
The biosram accessor support in soc/amd/common/block/acpimmio/biosram.c
is only used on Stoneyridge and the old amd/southbridge code and not on
Picasso or Cezanne. It also only builds as a 32 bit binary and breaks
when trying to build as a 64 bit binary, since the size of an uintptr_t
is different on those two. There is no support for using the 32 bit
binaryPI with a 64 bit coreboot while there is code to use a 32 bit FSP
with 64 bit coreboot, so not building this for FSP-based SoC support
moves us one step closer to be able to build coreboot as 64 bit binary
for Picasso and Cezanne.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I2d87ec2fa1b217eaf55d865e4390308812502e56
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56570
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/common')
-rw-r--r-- | src/soc/amd/common/block/acpimmio/Kconfig | 10 | ||||
-rw-r--r-- | src/soc/amd/common/block/acpimmio/Makefile.inc | 4 |
2 files changed, 12 insertions, 2 deletions
diff --git a/src/soc/amd/common/block/acpimmio/Kconfig b/src/soc/amd/common/block/acpimmio/Kconfig index d74a00bcb9..794ae3ed5e 100644 --- a/src/soc/amd/common/block/acpimmio/Kconfig +++ b/src/soc/amd/common/block/acpimmio/Kconfig @@ -3,3 +3,13 @@ config SOC_AMD_COMMON_BLOCK_ACPIMMIO help Select this option to enable hardware blocks in the AcpiMmio address space (0xfed8xxxx). + +if SOC_AMD_COMMON_BLOCK_ACPIMMIO + +config SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM + bool + help + Add functions to access settings stored in the biosram region. + This is only used by the SoCs using binaryPI and the old AGESA. + +endif # SOC_AMD_COMMON_BLOCK_ACPIMMIO diff --git a/src/soc/amd/common/block/acpimmio/Makefile.inc b/src/soc/amd/common/block/acpimmio/Makefile.inc index 6537d5625d..bbc52fbd3d 100644 --- a/src/soc/amd/common/block/acpimmio/Makefile.inc +++ b/src/soc/amd/common/block/acpimmio/Makefile.inc @@ -3,8 +3,8 @@ ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO),y) all-y += mmio_util.c smm-y += mmio_util.c -all-y += biosram.c -smm-y += biosram.c +all-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM) += biosram.c +smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM) += biosram.c bootblock-y += print_reset_status.c |