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authorRaul E Rangel <rrangel@chromium.org>2021-05-04 14:29:09 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-05-09 18:10:54 +0000
commit6d9a0eab702213514cc7fba8d0a71c39b2a14585 (patch)
treeaaab8deecad64590655b2da3d239520212eef1a6 /src/soc/amd/common/vboot/vbnv_cmos.c
parentf486fcc9985f57c87e2a44a0cc7f1fdc8af32740 (diff)
mb/google/guybrush: Populate PIC IRQ data
The PIC IRQs are required so we can correctly set up the PCI_INT registers. This only matters when booting in PIC mode. We don't need to set the IO-APIC registers since the linux kernel will auto-assign those to reduce conflicts. BUG=b:184766519 TEST=Boot guybrush with `pci=nomsi,noacpi amd_iommu=off noapic` and verify xhci and graphics continue to work. $ cat /proc/interrupts 12: 285064 XT-PIC nvme0q0, nvme0q1, rtw88_pci 13: 100000 XT-PIC xhci-hcd:usb1 14: 4032 XT-PIC amdgpu, xhci-hcd:usb3 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I1d66ccd08a86a64242dbc909c57ff9685828f61f Reviewed-on: https://review.coreboot.org/c/coreboot/+/52915 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common/vboot/vbnv_cmos.c')
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