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authorFelix Held <felix-coreboot@felixheld.de>2020-12-10 16:49:28 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-12-11 17:44:19 +0000
commite04a18fc25cfb28690cd7dbd3302a63436b1ccd2 (patch)
tree05b34f8a2cb4daa977dc4ab8cdda0c8f916b1a64 /src/soc/amd/common/fsp
parent2f917e6cee275eda6bd620cb3dbf2ebf17173ed9 (diff)
soc/amd/picasso: move chipset_handle_reset to common
The FSP integration code needs this function to be present. It's not supposed to be called, but if it is, it'll print an error and call the SoC's cold reset function. Change-Id: I15f2622d9d9d0f22e3cf8e6283b578f5933b1a9f Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48537 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/common/fsp')
-rw-r--r--src/soc/amd/common/fsp/Makefile.inc4
-rw-r--r--src/soc/amd/common/fsp/fsp_reset.c15
2 files changed, 19 insertions, 0 deletions
diff --git a/src/soc/amd/common/fsp/Makefile.inc b/src/soc/amd/common/fsp/Makefile.inc
new file mode 100644
index 0000000000..5523876a7e
--- /dev/null
+++ b/src/soc/amd/common/fsp/Makefile.inc
@@ -0,0 +1,4 @@
+ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y)
+romstage-y += fsp_reset.c
+ramstage-y += fsp_reset.c
+endif # CONFIG_PLATFORM_USES_FSP2_0
diff --git a/src/soc/amd/common/fsp/fsp_reset.c b/src/soc/amd/common/fsp/fsp_reset.c
new file mode 100644
index 0000000000..62480bf319
--- /dev/null
+++ b/src/soc/amd/common/fsp/fsp_reset.c
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <amdblocks/reset.h>
+#include <assert.h>
+#include <console/console.h>
+#include <fsp/util.h>
+#include <stdint.h>
+
+void chipset_handle_reset(uint32_t status)
+{
+ printk(BIOS_ERR, "Error: unexpected call to %s(0x%08x). Doing cold reset.\n",
+ __func__, status);
+ BUG();
+ do_cold_reset();
+}