diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2022-02-16 16:00:19 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-17 15:44:26 +0000 |
| commit | 79313528cdba81538901721707b3cfee6c3e5220 (patch) | |
| tree | fdb647ee64769c73226012900b6382d75c10a059 /src/soc/amd/common/block | |
| parent | ffc8532869445fd73822d2648e44bff1f90d573f (diff) | |
amd/common/block/spi/fch_spi_ctrl: use uintptr_t for addresses
This fixes a build failure when trying to build the code in 64 bit mode.
TEST=Timeless build for Chausie results in identical image.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: If8fe7b626d9d72c0b8ed07ced93e46f795e36848
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62052
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aamir Bohra <aamirbohra@gmail.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/common/block')
| -rw-r--r-- | src/soc/amd/common/block/spi/fch_spi_ctrl.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/spi/fch_spi_ctrl.c b/src/soc/amd/common/block/spi/fch_spi_ctrl.c index f79024776c..b2fe13d107 100644 --- a/src/soc/amd/common/block/spi/fch_spi_ctrl.c +++ b/src/soc/amd/common/block/spi/fch_spi_ctrl.c @@ -38,7 +38,7 @@ enum spi_dump_state_phase { static void dump_state(enum spi_dump_state_phase phase) { u8 dump_size; - u32 addr; + uintptr_t addr; if (!CONFIG(SOC_AMD_COMMON_BLOCK_SPI_DEBUG)) return; |