diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-12 00:43:20 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-13 20:57:23 +0000 |
| commit | 604ffa6d23463c17f83e26d1f52c48865487546f (patch) | |
| tree | 51c66d452ad155a16be86a730e064a6083088399 /src/soc/amd/common/block | |
| parent | 5f5b7ddbf3f80cbd4135aaa0d668387acf40d7a5 (diff) | |
soc/amd: introduce and use common IOAPIC IDs
Stoneyridge used CONFIG_MAX_CPUS and CONFIG_MAX_CPUS + 1 directly as
IOAPIC IDs and Picasso had Kconfig options to configure that, but still
used the common SMBus controller code that used CONFIG_MAX_CPUS as ID
for the FCH IOAPIC. If a board overrides the PICASSO_FCH_IOAPIC_ID
Kconfig option to a value that isn't CONFIG_MAX_CPUS, we'll get a
mismatch between the ID that gets written into the FCH IOAPIC register
and the ID in the corresponding ACPI table. In order to avoid that add
defines to each SOC's southbridge.c and use them in all soc/amd code.
Change-Id: I94f54d3e6d284391ae6ecad00a76de18dcdd4669
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50575
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common/block')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/ioapic.h | 9 | ||||
| -rw-r--r-- | src/soc/amd/common/block/smbus/sm.c | 4 |
2 files changed, 11 insertions, 2 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/ioapic.h b/src/soc/amd/common/block/include/amdblocks/ioapic.h new file mode 100644 index 0000000000..4c10a84a03 --- /dev/null +++ b/src/soc/amd/common/block/include/amdblocks/ioapic.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef AMD_BLOCK_IOAPIC_H +#define AMD_BLOCK_IOAPIC_H + +#define FCH_IOAPIC_ID CONFIG_MAX_CPUS +#define GNB_IOAPIC_ID (CONFIG_MAX_CPUS + 1) + +#endif /* AMD_BLOCK_IOAPIC_H */ diff --git a/src/soc/amd/common/block/smbus/sm.c b/src/soc/amd/common/block/smbus/sm.c index b1b3db6192..ebd3f258a9 100644 --- a/src/soc/amd/common/block/smbus/sm.c +++ b/src/soc/amd/common/block/smbus/sm.c @@ -1,18 +1,18 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <amdblocks/acpimmio.h> +#include <amdblocks/ioapic.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/smbus.h> #include <device/smbus_host.h> #include <arch/ioapic.h> -#include <soc/southbridge.h> static void sm_init(struct device *dev) { fch_enable_ioapic_decode(); - setup_ioapic(VIO_APIC_VADDR, CONFIG_MAX_CPUS); + setup_ioapic(VIO_APIC_VADDR, FCH_IOAPIC_ID); fch_configure_hpet(); } |