diff options
author | Raul E Rangel <rrangel@chromium.org> | 2021-02-18 16:36:08 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-22 07:29:19 +0000 |
commit | 58a8ad1661ab0fd869bcbc955010717c011951b0 (patch) | |
tree | 258f3443c01475acff0cd112ee3f5eaeabbf7b69 /src/soc/amd/common/block | |
parent | bde284b585d801f733f5d7bbe64491a7daaf552d (diff) |
soc/amd: Move root complex SSDT TOM1/TOM2 generation function
This will also be used for cezanne. Stoney also has a similar function,
but it hard codes the scope path. I didn't have a device setup to test
if switching to this function was a no-op. So I left it.
TOM2 isn't used by any ASL, so we could remove it later.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I7c8f476a7735fea61a3244b97988e3ead3b42e79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/common/block')
-rw-r--r-- | src/soc/amd/common/block/acpi/tables.c | 31 | ||||
-rw-r--r-- | src/soc/amd/common/block/include/amdblocks/acpi.h | 1 |
2 files changed, 32 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/acpi/tables.c b/src/soc/amd/common/block/acpi/tables.c index 88ff252b26..8bad755de1 100644 --- a/src/soc/amd/common/block/acpi/tables.c +++ b/src/soc/amd/common/block/acpi/tables.c @@ -1,8 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <amdblocks/acpi.h> #include <amdblocks/chip.h> +#include <assert.h> +#include <cpu/amd/msr.h> +#include <cpu/amd/mtrr.h> #include <device/device.h> #include <types.h> @@ -45,3 +49,30 @@ unsigned long acpi_fill_madt_irqoverride(unsigned long current) return current; } + +/* Used by \_SB.PCI0._CRS */ +void acpi_fill_root_complex_tom(const struct device *device) +{ + msr_t msr; + const char *scope; + + assert(device); + + scope = acpi_device_scope(device); + assert(scope); + acpigen_write_scope(scope); + + msr = rdmsr(TOP_MEM); + acpigen_write_name_dword("TOM1", msr.lo); + msr = rdmsr(TOP_MEM2); + /* + * Since XP only implements parts of ACPI 2.0, we can't use a qword + * here. + * See http://www.acpi.info/presentations/S01USMOBS169_OS%2520new.ppt + * slide 22ff. + * Shift value right by 20 bit to make it fit into 32bit, + * giving us 1MB granularity and a limit of almost 4Exabyte of memory. + */ + acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20); + acpigen_pop_len(); +} diff --git a/src/soc/amd/common/block/include/amdblocks/acpi.h b/src/soc/amd/common/block/include/amdblocks/acpi.h index d0806ece9d..215d6682cb 100644 --- a/src/soc/amd/common/block/include/amdblocks/acpi.h +++ b/src/soc/amd/common/block/include/amdblocks/acpi.h @@ -54,5 +54,6 @@ unsigned long southbridge_write_acpi_tables(const struct device *device, unsigne struct acpi_rsdp *rsdp); unsigned long acpi_fill_madt_irqoverride(unsigned long current); +void acpi_fill_root_complex_tom(const struct device *device); #endif /* AMD_BLOCK_ACPI_H */ |