soc/amd/common/acp: Move Audio Co-processor driver to common

Audio Co-processor driver is similar for both Picasso and Cezanne SoCs.
Hence move it to the common location.

BUG=None.
TEST=Builds Dalboz, Trembyle, Vilboz, Mandolin and Bilby mainboards.

Change-Id: I91470ff68d1c183df9a2927d71b03371b535186a
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52643
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>

5 files changed, 104 insertions, 0 deletions

diff --git a/src/soc/amd/common/block/acp/Kconfig b/src/soc/amd/common/block/acp/Kconfig
new file mode 100644
index 0000000000..ca733cd5de
--- /dev/null
+++ b/src/soc/amd/common/block/acp/Kconfig
@@ -0,0 +1,4 @@
+config SOC_AMD_COMMON_BLOCK_ACP
+	bool
+	help
+	  Select this option to perform Audio Co-Processor(ACP) configuration.
diff --git a/src/soc/amd/common/block/acp/Makefile.inc b/src/soc/amd/common/block/acp/Makefile.inc
new file mode 100644
index 0000000000..cdff5bdb76
--- /dev/null
+++ b/src/soc/amd/common/block/acp/Makefile.inc
@@ -0,0 +1 @@
+ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACP) += acp.c
diff --git a/src/soc/amd/common/block/acp/acp.c b/src/soc/amd/common/block/acp/acp.c
new file mode 100644
index 0000000000..3cb7c453c8
--- /dev/null
+++ b/src/soc/amd/common/block/acp/acp.c
@@ -0,0 +1,70 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi_device.h>
+#include <acpi/acpigen.h>
+#include <amdblocks/acp.h>
+#include <amdblocks/acpimmio.h>
+#include <amdblocks/chip.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/mmio.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include <commonlib/helpers.h>
+
+/* ACP registers and associated fields */
+#define ACP_I2S_PIN_CONFIG	0x1400	/* HDA, Soundwire, I2S */
+#define  PIN_CONFIG_MASK	(7 << 0)
+#define ACP_I2S_WAKE_EN		0x1414
+#define  WAKE_EN_MASK		(1 << 0)
+#define ACP_PME_EN		0x1418
+#define  PME_EN_MASK		(1 << 0)
+
+static void acp_update32(uintptr_t bar, uint32_t reg, uint32_t clear, uint32_t set)
+{
+	clrsetbits32((void *)(bar + reg), clear, set);
+}
+
+static void init(struct device *dev)
+{
+	const struct soc_amd_common_config *cfg = soc_get_common_config();
+	struct resource *res;
+	uintptr_t bar;
+
+	res = dev->resource_list;
+	if (!res || !res->base) {
+		printk(BIOS_ERR, "Error, unable to configure pin in %s\n", __func__);
+		return;
+	}
+
+	/* Set the proper I2S_PIN_CONFIG state */
+	bar = (uintptr_t)res->base;
+	acp_update32(bar, ACP_I2S_PIN_CONFIG, PIN_CONFIG_MASK, cfg->acp_config.acp_pin_cfg);
+
+	/* Enable ACP_PME_EN and ACP_I2S_WAKE_EN for I2S_WAKE event */
+	acp_update32(bar, ACP_I2S_WAKE_EN, WAKE_EN_MASK, !!cfg->acp_config.acp_i2s_wake_enable);
+	acp_update32(bar, ACP_PME_EN, PME_EN_MASK, !!cfg->acp_config.acp_pme_enable);
+}
+
+static const char *acp_acpi_name(const struct device *dev)
+{
+	return "ACPD";
+}
+
+static struct device_operations acp_ops = {
+	.read_resources = pci_dev_read_resources,
+	.set_resources = pci_dev_set_resources,
+	.enable_resources = pci_dev_enable_resources,
+	.init = init,
+	.ops_pci = &pci_dev_ops_pci,
+	.scan_bus = scan_static_bus,
+	.acpi_name = acp_acpi_name,
+	.acpi_fill_ssdt = acpi_device_write_pci_dev,
+};
+
+static const struct pci_driver acp_driver __pci_driver = {
+	.ops = &acp_ops,
+	.vendor = PCI_VENDOR_ID_AMD,
+	.device = PCI_DEVICE_ID_AMD_FAM17H_ACP,
+};
diff --git a/src/soc/amd/common/block/include/amdblocks/acp.h b/src/soc/amd/common/block/include/amdblocks/acp.h
new file mode 100644
index 0000000000..f091c0540f
--- /dev/null
+++ b/src/soc/amd/common/block/include/amdblocks/acp.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef AMD_COMMON_ACP_H
+#define AMD_COMMON_ACP_H
+
+struct acp_config {
+	enum {
+		I2S_PINS_MAX_HDA = 0,	/* HDA w/reset  3xSDI, SW w/Data0 */
+		I2S_PINS_MAX_MHDA = 1,	/* HDA no reset 3xSDI, SW w/Data0-1 */
+		I2S_PINS_MIN_HDA = 2,	/* HDA w/reset  1xSDI, SW w/Data0-2 */
+		I2S_PINS_MIN_MHDA = 3,	/* HDA no reset 1xSDI, SW w/Data0-3 */
+		I2S_PINS_I2S_TDM = 4,
+		I2S_PINS_UNCONF = 7,	/* All pads will be input mode */
+	} acp_pin_cfg;
+
+	/* Enable ACP I2S wake feature (0 = disable, 1 = enable) */
+	u8 acp_i2s_wake_enable;
+	/* Enable ACP PME (0 = disable, 1 = enable) */
+	u8 acp_pme_enable;
+
+	/* If using an external 48MHz OSC for codec, will disable internal X48M_OSC */
+	bool acp_i2s_use_external_48mhz_osc;
+};
+
+#endif /* AMD_COMMON_ACP_H */
diff --git a/src/soc/amd/common/block/include/amdblocks/chip.h b/src/soc/amd/common/block/include/amdblocks/chip.h
index b06ff85d11..c80a6746e0 100644
--- a/src/soc/amd/common/block/include/amdblocks/chip.h
+++ b/src/soc/amd/common/block/include/amdblocks/chip.h
@@ -5,6 +5,7 @@
 
 #include <amdblocks/espi.h>
 #include <amdblocks/spi.h>
+#include <amdblocks/acp.h>
 #include <stdint.h>
 
 struct soc_amd_common_config {
@@ -36,6 +37,9 @@ struct soc_amd_common_config {
 		/* See MP_IRQ_* from mpspec.h */
 		uint8_t flags;
 	} irq_override[16];
+
+	/* Audio Co-processor (ACP) configuration */
+	struct acp_config acp_config;
 };
 
 /*