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authorFelix Held <felix-coreboot@felixheld.de>2023-03-25 04:58:40 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-03-29 16:21:19 +0000
commit78cbcefb7662b5f749b5583dce2c78b100b9d58e (patch)
treee35ca35544c168d9bba2d73c50b0ce4e73495501 /src/soc/amd/common/block/smi
parent2323acab6a7a4624e7f7de7e0f93e3aef4fc0157 (diff)
soc/amd/common/acpi/cpu_power_state: introduce & use get_pstate_latency
On the Zen-based CPUs, the transition and bus master latency are always written as 0, but on but on Stoneyridge hardware-dependent values are used. Introduce get_pstate_latency that returns 0 for all non-CAR AMD CPUs. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I81086fa64909c7350b3b171ea6ea9b46f1708f67 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74024 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/common/block/smi')
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