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author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-09-04 11:00:06 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2019-09-09 22:19:33 +0000 |
commit | ba2533f0ee952a2bbe90ed60d5ab3d4c19513aa0 (patch) | |
tree | c2475556183b1e5dee88872b8f546b9e27b84e66 /src/soc/amd/common/block/psp | |
parent | 5aacda4b9824cebcc7d5f816419b6f9cc82be8a0 (diff) |
soc/amd/common/lpc: Add decode disable function
It is already trivial to set D14F3x44 to 0, but add a function to wipe
both that and the settings in D14F3x48, along with x48's associated
addresses.
Change-Id: Ibec25562b2a1568681aea7caf86f00094c436a50
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/amd/common/block/psp')
0 files changed, 0 insertions, 0 deletions