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| author | Martin Roth <gaumless@gmail.com> | 2023-02-01 11:55:28 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-04 03:22:50 +0000 |
| commit | c46c15b5920bf8378c333f862a8f5766cf104c85 (patch) | |
| tree | e867fe9aff8e07265ec614d8645d30031a935996 /src/soc/amd/common/block/pm/Kconfig | |
| parent | 9f5a5eefc32b6db7418955968f888ba3fccab3c7 (diff) | |
soc/amd: Create AMD common reset code
This allows us to use the same file for PCO, CZN, MDN, PHX, & Glinda.
PCO supports the warm reset, and future chips can support it by setting
the SOC_AMD_SUPPORTS_WARM_RESET option.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ib6459e7ab82aacbe57b4c2fc5bbb3759dc5266f7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72658
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common/block/pm/Kconfig')
| -rw-r--r-- | src/soc/amd/common/block/pm/Kconfig | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/pm/Kconfig b/src/soc/amd/common/block/pm/Kconfig index 538301de32..7d2513ef97 100644 --- a/src/soc/amd/common/block/pm/Kconfig +++ b/src/soc/amd/common/block/pm/Kconfig @@ -15,3 +15,14 @@ config SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE platforms that use FSP for hardware initialization. endif # SOC_AMD_COMMON_BLOCK_PM + +config SOC_AMD_COMMON_BLOCK_RESET + bool + help + Select this option to use AMD common reset driver support. + +config SOC_AMD_SUPPORTS_WARM_RESET + bool + depends on SOC_AMD_COMMON_BLOCK_RESET + help + Select this option if the chip supports warm reset. |