diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2022-10-18 19:03:20 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-10-20 16:47:35 +0000 |
| commit | 97e612586af1ece276b5dd3d3623bf80486c0b26 (patch) | |
| tree | 1f74ddeac4553be8755f27b56c57e5bc123e9fac /src/soc/amd/common/block/include | |
| parent | 8ebdbbc3cb0aaca6581a7ba0a3ad92784ed502df (diff) | |
soc/amd/*/uart: commonize UART code and MMIO device driver
Now that the SoC-specific UART controller data and the common code part
are cleanly separated, move the code to the common AMD UART support
block folder. The code is identical to the UART code in Cezanne,
Mendocino, Morgana and Picasso while Stoneyridge doesn't use the parts
related to the MMIO device driver.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id9429dac44bc02147a839db89d06e8eded7f1af2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68561
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/common/block/include')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/uart.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/uart.h b/src/soc/amd/common/block/include/amdblocks/uart.h index a613bbec83..fbce4e8167 100644 --- a/src/soc/amd/common/block/include/amdblocks/uart.h +++ b/src/soc/amd/common/block/include/amdblocks/uart.h @@ -15,7 +15,9 @@ struct soc_uart_ctrlr_info { }; uintptr_t get_uart_base(unsigned int idx); /* get MMIO base address of FCH UART */ -void uart_inject_ssdt(const struct device *dev); void set_uart_config(unsigned int idx); /* configure hardware of FCH UART selected by idx */ +/* Getter function to get the SoC UART Controller Information. */ +const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs); + #endif /* AMD_BLOCK_UART_H */ |