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authorFelix Held <felix-coreboot@felixheld.de>2022-05-04 19:04:33 +0200
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-08-17 19:46:30 +0000
commit62d42c3266a633cd11009148522b4adb2542976e (patch)
treed5c55ab2297651c1b7b09325e4efdc0567e5b348 /src/soc/amd/common/block/include
parent9022344cde972437f14a8516abd7354acbdad136 (diff)
soc/amd/common/include/espi: add more decode ranges
Mendocino has more eSPI decode ranges than Picasso or Cezanne. To support these additional ranges, introduce a new Kconfig option SOC_AMD_COMMON_BLOCK_ESPI_EXTENDED_DECODE_RANGES that can be selected by the SoCs that support the additional eSPI IO/MMIO decode ranges. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ib761cdf201c35805d68cf5e8e462607ffd9fa017 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64054 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/common/block/include')
-rw-r--r--src/soc/amd/common/block/include/amdblocks/espi.h10
1 files changed, 9 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/espi.h b/src/soc/amd/common/block/include/amdblocks/espi.h
index 296ae4e1e3..b7ab06ee55 100644
--- a/src/soc/amd/common/block/include/amdblocks/espi.h
+++ b/src/soc/amd/common/block/include/amdblocks/espi.h
@@ -14,9 +14,17 @@
#define ESPI_DECODE_IO_0X60_0X64_EN (1 << 1)
#define ESPI_DECODE_IO_0X2E_0X2F_EN (1 << 0)
+/* The extended IO/MMIO decode ranges are only available in SoCs that select
+ SOC_AMD_COMMON_BLOCK_ESPI_EXTENDED_DECODE_RANGES */
+#if CONFIG(SOC_AMD_COMMON_BLOCK_ESPI_EXTENDED_DECODE_RANGES)
+#define ESPI_GENERIC_IO_WIN_COUNT 16
+#define ESPI_GENERIC_MMIO_WIN_COUNT 5
+#else
#define ESPI_GENERIC_IO_WIN_COUNT 4
-#define ESPI_GENERIC_IO_MAX_WIN_SIZE 0x100
#define ESPI_GENERIC_MMIO_WIN_COUNT 4
+#endif
+
+#define ESPI_GENERIC_IO_MAX_WIN_SIZE 0x100
#define ESPI_GENERIC_MMIO_MAX_WIN_SIZE 0x10000
#define ESPI_SLAVE0_CONFIG 0x68