soc/amd/common/block/i2c: Move SoC agnostic parts into common

The logic behind I2C bus initialization, I2C MMIO base address getter
and setter, I2C bus ACPI name resolution are identical for all the AMD
SoCs. Hence moving all the SoC agnotic parts of the driver into the
common driver and just configure the SoC specific parts into individual
I2C drivers.

BUG=None
TEST=Build Dalboz and Grunt. Boot to OS in Dalboz. Ensure that the I2C
peripherals are detected as earlier in Dalboz. Verify some I2C
peripheral functionality like trackpad and touchscreen.

Change-Id: Ic9c99ec769d7d8ad7e1e566fdf42a5206657183d
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Suggested-by: Kyosti Malkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51509
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 34 insertions, 0 deletions

diff --git a/src/soc/amd/common/block/include/amdblocks/i2c.h b/src/soc/amd/common/block/include/amdblocks/i2c.h
index 9fa203bf57..497de6f28e 100644
--- a/src/soc/amd/common/block/include/amdblocks/i2c.h
+++ b/src/soc/amd/common/block/include/amdblocks/i2c.h
@@ -4,8 +4,27 @@
 #define AMD_COMMON_BLOCK_I2C_H
 
 #include <amdblocks/gpio_banks.h>
+#include <device/i2c.h>
+#include <drivers/i2c/designware/dw_i2c.h>
 #include <types.h>
 
+/* Enum to identify in which mode the I2C controller is operating. */
+enum i2c_ctrlr_mode {
+	I2C_MASTER_MODE,
+	I2C_PERIPHERAL_MODE,
+};
+
+/**
+ * Data structure to hold SoC I2C controller information
+ * @bar:	MMIO base address for the I2C bus.
+ * @acpi_name:	ACPI Name corresponding to the I2C bus.
+ */
+struct soc_i2c_ctrlr_info {
+	enum i2c_ctrlr_mode mode;
+	uintptr_t bar;
+	const char *acpi_name;
+};
+
 /**
  * Data structure to identify GPIO to be toggled to reset peripherals on an I2C bus.
  * @pin:	GPIO corresponding to I2C SCL that needs to be toggled/bit-banged.
@@ -30,6 +49,21 @@ struct soc_i2c_peripheral_reset_info {
 	uint32_t num_pins;
 };
 
+/* Helper function to perform misc I2C configuration specific to SoC. */
+void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg);
+
+/* Getter function to get the SoC I2C Controller Information. */
+const struct soc_i2c_ctrlr_info *soc_get_i2c_ctrlr_info(size_t *num_ctrlrs);
+
+/* Getter function to get the SoC I2C bus configuration. */
+const struct dw_i2c_bus_config *soc_get_i2c_bus_config(size_t *num_buses);
+
+/* Initialize all the i2c buses that are marked with early init. */
+void i2c_soc_early_init(void);
+
+/* Initialize all the i2c buses that are not marked with early init. */
+void i2c_soc_init(void);
+
 /* Reset I2C peripherals. */
 void sb_reset_i2c_peripherals(const struct soc_i2c_peripheral_reset_info *reset_info);