summaryrefslogtreecommitdiff
path: root/src/soc/amd/common/block/include/amdblocks
diff options
context:
space:
mode:
authorFurquan Shaikh <furquan@google.com>2020-05-04 23:38:53 -0700
committerFurquan Shaikh <furquan@google.com>2020-05-12 20:05:55 +0000
commitf318e03495e9a1d43d64516d77a6ae5f2c4d6999 (patch)
tree88084526ebbbceb902d0d0e32592425b072cac56 /src/soc/amd/common/block/include/amdblocks
parentdd5264612ae8145c8c8e38d2ff3fb7e47de8e4b2 (diff)
soc/amd/common/block/lpc: Add helpers for managing eSPI decode
This change adds the following helper functions for eSPI decode: 1. espi_open_io_window() - Open generic IO window decoded by eSPI 2. espi_open_mmio_window() - Open generic MMIO window decoded by eSPI 3. espi_configure_decodes() - Configures standard and generic I/O windows using the espi configuration provided by mainboard in device tree. BUG=b:153675913,b:154445472 Change-Id: Idb49ef0477280eb46ecad65131d4cd7357618941 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41073 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common/block/include/amdblocks')
-rw-r--r--src/soc/amd/common/block/include/amdblocks/chip.h4
-rw-r--r--src/soc/amd/common/block/include/amdblocks/espi.h31
2 files changed, 35 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/chip.h b/src/soc/amd/common/block/include/amdblocks/chip.h
index 6e3c973c97..b0348115e9 100644
--- a/src/soc/amd/common/block/include/amdblocks/chip.h
+++ b/src/soc/amd/common/block/include/amdblocks/chip.h
@@ -4,6 +4,7 @@
#ifndef __AMDBLOCKS_CHIP_H__
#define __AMDBLOCKS_CHIP_H__
+#include <amdblocks/espi.h>
#include <amdblocks/spi.h>
struct soc_amd_common_config {
@@ -17,6 +18,9 @@ struct soc_amd_common_config {
* TPM speed - 66MHz
*/
struct spi_config spi_config;
+
+ /* eSPI configuration */
+ struct espi_config espi_config;
};
/*
diff --git a/src/soc/amd/common/block/include/amdblocks/espi.h b/src/soc/amd/common/block/include/amdblocks/espi.h
index 82410e58d3..53cc5f9f3f 100644
--- a/src/soc/amd/common/block/include/amdblocks/espi.h
+++ b/src/soc/amd/common/block/include/amdblocks/espi.h
@@ -4,6 +4,9 @@
#ifndef __AMDBLOCKS_ESPI_H__
#define __AMDBLOCKS_ESPI_H__
+#include <stdint.h>
+#include <stddef.h>
+
/* eSPI MMIO base lives at an offset of 0x10000 from the address in SPI BAR. */
#define ESPI_OFFSET_FROM_BAR 0x10000
@@ -24,4 +27,32 @@
#define ESPI_GENERIC_MMIO_WIN_COUNT 4
#define ESPI_GENERIC_MMIO_MAX_WIN_SIZE 0x10000
+struct espi_config {
+ /* Bitmap for standard IO decodes. Use ESPI_DECODE_IO_* above. */
+ uint32_t std_io_decode_bitmap;
+
+ struct {
+ uint16_t base;
+ size_t size;
+ } generic_io_range[ESPI_GENERIC_IO_WIN_COUNT];
+};
+
+/*
+ * Open I/O window using the provided base and size.
+ * Return value: 0 = success, -1 = error.
+ */
+int espi_open_io_window(uint16_t base, size_t size);
+
+/*
+ * Open MMIO window using the provided base and size.
+ * Return value: 0 = success, -1 = error.
+ */
+int espi_open_mmio_window(uint32_t base, size_t size);
+
+/*
+ * Configure generic and standard I/O decode windows using the espi_config structure settings
+ * provided by mainboard in device tree.
+ */
+void espi_configure_decodes(void);
+
#endif /* __AMDBLOCKS_ESPI_H__ */