soc/amd/common/espi,mb/: Allow configuring open drain ALERT#

Some designs might wish to use an open drain eSPI ALERT#. This change
adds an enum that allows setting the eSPI alert mode.

BUG=b:187122344, b:186135022
TEST=Boot guybrush using all 3 alert modes

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ia35fc59a699cf9444b53aad5c9bb71aa27ce9251
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52954
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>

1 files changed, 7 insertions, 1 deletions

diff --git a/src/soc/amd/common/block/include/amdblocks/espi.h b/src/soc/amd/common/block/include/amdblocks/espi.h
index 82bfcbe38e..5d758354c5 100644
--- a/src/soc/amd/common/block/include/amdblocks/espi.h
+++ b/src/soc/amd/common/block/include/amdblocks/espi.h
@@ -73,6 +73,12 @@ enum espi_op_freq {
 	ESPI_OP_FREQ_66_MHZ = ESPI_OP_FREQ_VALUE(2),
 };
 
+enum espi_alert_pin {
+	ESPI_ALERT_PIN_IN_BAND,
+	ESPI_ALERT_PIN_PUSH_PULL,
+	ESPI_ALERT_PIN_OPEN_DRAIN,
+};
+
 struct espi_config {
 	/* Bitmap for standard IO decodes. Use ESPI_DECODE_IO_* above. */
 	uint32_t std_io_decode_bitmap;
@@ -85,9 +91,9 @@ struct espi_config {
 	/* Slave configuration parameters */
 	enum espi_io_mode io_mode;
 	enum espi_op_freq op_freq_mhz;
+	enum espi_alert_pin alert_pin;
 
 	uint32_t crc_check_enable:1;
-	uint32_t dedicated_alert_pin:1;
 	uint32_t periph_ch_en:1;
 	uint32_t vw_ch_en:1;
 	uint32_t oob_ch_en:1;