diff options
| author | Raul E Rangel <rrangel@chromium.org> | 2021-02-10 16:36:33 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-02-12 20:44:48 +0000 |
| commit | 0f3bc81210f364a6e96edd090d9310844aa30aa2 (patch) | |
| tree | 98ed030848ddb46c2cf03cdd7b221d1c7fc153d9 /src/soc/amd/common/block/include/amdblocks | |
| parent | 48c99db6d6af3bf642866646b915bc5a57dcb4a5 (diff) | |
soc/amd: Move southbridge_write_acpi_tables
This is common between all the chipsets.
It's also required by common/block/lpc/lpc.c.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I361dfabfe0c04667a2c112955133831a985d5cc0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50509
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/common/block/include/amdblocks')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/acpi.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/acpi.h b/src/soc/amd/common/block/include/amdblocks/acpi.h index aa40706f96..badc77bb9f 100644 --- a/src/soc/amd/common/block/include/amdblocks/acpi.h +++ b/src/soc/amd/common/block/include/amdblocks/acpi.h @@ -3,8 +3,9 @@ #ifndef AMD_BLOCK_ACPI_H #define AMD_BLOCK_ACPI_H -#include <types.h> +#include <acpi/acpi.h> #include <amdblocks/gpio_banks.h> +#include <types.h> /* ACPI MMIO registers 0xfed80800 */ #define MMIO_ACPI_PM1_STS 0x00 @@ -47,4 +48,7 @@ struct chipset_power_state { struct gpio_wake_state gpio_state; }; +unsigned long southbridge_write_acpi_tables(const struct device *device, unsigned long current, + struct acpi_rsdp *rsdp); + #endif /* AMD_BLOCK_ACPI_H */ |