diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-02-02 16:13:05 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-07 11:01:33 +0000 |
| commit | 77128a8dcd119b713f755efee64222f2d79217bb (patch) | |
| tree | 57f42c7f8579dda3d4201772989a492df773c3ec /src/soc/amd/common/block/data_fabric | |
| parent | 0d34a50a360228138ade623e799b03eaba83b0a5 (diff) | |
soc/amd/common/data_fabric_helper: normalize addresses in debug print
Instead of just printing the register contents, normalize the contents
of the base and limit registers to actual MMIO addresses and then print
those. This will hopefully avoid some confusion caused by the shifted
addresses.
Output on Mandolin before the patch:
=== Data Fabric MMIO configuration registers ===
Addresses are shifted to the right by 16 bits.
idx control base limit
0 93 fc00 febf
1 93 1000000 ffffffff
2 93 d000 f7ff
3 1093 fed0 fedf
4 90 0 0
5 90 0 0
6 90 0 0
7 90 0 0
Output on Mandolin after the patch:
=== Data Fabric MMIO configuration registers ===
idx control base limit
0 93 fc000000 febfffff
1 93 10000000000 ffffffffffff
2 93 d0000000 f7ffffff
3 1093 fed00000 fedfffff
4 90 0 ffff
5 90 0 ffff
6 90 0 ffff
7 90 0 ffff
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I62eeb88ddac6a7a421fccc8e433523459117976a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72739
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/common/block/data_fabric')
| -rw-r--r-- | src/soc/amd/common/block/data_fabric/data_fabric_helper.c | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c index 412daaee64..b64edcd10d 100644 --- a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c +++ b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c @@ -47,16 +47,23 @@ void data_fabric_write32(uint8_t function, uint16_t reg, uint8_t instance_id, ui void data_fabric_print_mmio_conf(void) { + uint32_t control; + uint64_t base, limit; printk(BIOS_SPEW, "=== Data Fabric MMIO configuration registers ===\n" - "Addresses are shifted to the right by 16 bits.\n" - "idx control base limit\n"); + "idx control base limit\n"); for (unsigned int i = 0; i < NUM_NB_MMIO_REGS; i++) { - printk(BIOS_SPEW, " %2u %8x %8x %8x\n", - i, - data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(i)), - data_fabric_broadcast_read32(0, NB_MMIO_BASE(i)), - data_fabric_broadcast_read32(0, NB_MMIO_LIMIT(i))); + control = data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(i)); + /* Base and limit address registers don't contain the lower address bits, but + are shifted by D18F0_MMIO_SHIFT bits */ + base = (uint64_t)data_fabric_broadcast_read32(0, NB_MMIO_BASE(i)) + << D18F0_MMIO_SHIFT; + limit = (uint64_t)data_fabric_broadcast_read32(0, NB_MMIO_LIMIT(i)) + << D18F0_MMIO_SHIFT; + /* Lower D18F0_MMIO_SHIFT address limit bits are all 1 */ + limit += (1 << D18F0_MMIO_SHIFT) - 1; + printk(BIOS_SPEW, " %2u %8x %16llx %16llx\n", + i, control, base, limit); } } |