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authorYuchen He <yuchenhe126@gmail.com>2023-07-25 21:28:36 +0200
committerMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2023-08-05 16:04:46 +0000
commit1e67adbc73e30be098ce163e3d27a7a7ecf68ae0 (patch)
treea2880851ac6c754d94fc056472beb5ec133ab0b4 /src/soc/amd/common/block/cpu
parent71b8ee0da407158d51eb7d86a6e1d4c458fc8e96 (diff)
src/*/post_code.h: Change post code prefix to POSTCODE
The prefix POSTCODE makes it clear that the macro is a post code. Hence, replace related macros starting with POST to POSTCODE and also replace every instance the macros are invoked with the new name. The files was changed by running the following bash script from the top level directory. header="src/soc/amd/common/block/include/amdblocks/post_codes.h \ src/include/cpu/intel/post_codes.h \ src/soc/intel/common/block/include/intelblocks/post_codes.h" array=`grep -r "#define POST_" $header | \ tr '\t' ' ' | cut -d ":" -f 2 | cut -d " " -f 2` for str in $array; do splitstr=`echo $str | cut -d '_' -f2-` grep -r $str src | cut -d ':' -f 1 | \ xargs sed -i'' -e "s/$str/POSTCODE_$splitstr/g" done Change-Id: Id2ca654126fc5b96e6b40d222bb636bbf39ab7ad Signed-off-by: Yuchen He <yuchenhe126@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76044 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/common/block/cpu')
-rw-r--r--src/soc/amd/common/block/cpu/car/cache_as_ram.S4
-rw-r--r--src/soc/amd/common/block/cpu/noncar/pre_c.S6
2 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/amd/common/block/cpu/car/cache_as_ram.S b/src/soc/amd/common/block/cpu/car/cache_as_ram.S
index 372f51517b..2bd3f5061e 100644
--- a/src/soc/amd/common/block/cpu/car/cache_as_ram.S
+++ b/src/soc/amd/common/block/cpu/car/cache_as_ram.S
@@ -28,7 +28,7 @@ _cache_as_ram_setup:
.global bootblock_pre_c_entry
bootblock_pre_c_entry:
- post_code(POST_BOOTBLOCK_PRE_C_ENTRY)
+ post_code(POSTCODE_BOOTBLOCK_PRE_C_ENTRY)
AMD_ENABLE_STACK
@@ -42,7 +42,7 @@ bootblock_pre_c_entry:
pushl %eax /* tsc[31:0] */
before_carstage:
- post_code(POST_BOOTBLOCK_PRE_C_DONE)
+ post_code(POSTCODE_BOOTBLOCK_PRE_C_DONE)
call bootblock_c_entry
/* Never reached */
diff --git a/src/soc/amd/common/block/cpu/noncar/pre_c.S b/src/soc/amd/common/block/cpu/noncar/pre_c.S
index 72d778886a..eb556fabd0 100644
--- a/src/soc/amd/common/block/cpu/noncar/pre_c.S
+++ b/src/soc/amd/common/block/cpu/noncar/pre_c.S
@@ -7,7 +7,7 @@
.global bootblock_resume_entry
bootblock_resume_entry:
- post_code(POST_BOOTBLOCK_RESUME_ENTRY)
+ post_code(POSTCODE_BOOTBLOCK_RESUME_ENTRY)
/* Get an early timestamp */
rdtsc
@@ -24,7 +24,7 @@ bootblock_resume_entry:
.global bootblock_pre_c_entry
bootblock_pre_c_entry:
- post_code(POST_BOOTBLOCK_PRE_C_ENTRY)
+ post_code(POSTCODE_BOOTBLOCK_PRE_C_ENTRY)
#if ENV_X86_64
#include <cpu/x86/64bit/entry64.inc>
@@ -57,7 +57,7 @@ bootblock_pre_c_entry:
pushl %eax /* tsc[31:0] */
#endif
- post_code(POST_BOOTBLOCK_PRE_C_DONE)
+ post_code(POSTCODE_BOOTBLOCK_PRE_C_DONE)
call bootblock_c_entry
/* Never reached */