diff options
author | Martin Roth <gaumless@gmail.com> | 2024-01-18 10:52:37 -0700 |
---|---|---|
committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-01-24 10:01:54 +0000 |
commit | b731550236e531552a5855bf32af644316cb9fe4 (patch) | |
tree | 52d71bfad2915b707161a4c2feef519900e081d6 /src/soc/amd/common/block/cpu/Makefile.mk | |
parent | 8b1aa3887665f4394f27283646c63a8cb437f137 (diff) |
soc/amd/*: Rename Makefiles from .inc to .mk
The .inc suffix is confusing to various tools as it's not specific to
Makefiles. This means that editors don't recognize the files, and don't
open them with highlighting and any other specific editor functionality.
This issue is also seen in the release notes generation script where
Makefiles get renamed before running cloc.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ie449267fe4fdd75110f577e1b9f748cd06140950
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80071
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src/soc/amd/common/block/cpu/Makefile.mk')
-rw-r--r-- | src/soc/amd/common/block/cpu/Makefile.mk | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/cpu/Makefile.mk b/src/soc/amd/common/block/cpu/Makefile.mk new file mode 100644 index 0000000000..1c4331cb91 --- /dev/null +++ b/src/soc/amd/common/block/cpu/Makefile.mk @@ -0,0 +1,26 @@ +## SPDX-License-Identifier: GPL-2.0-only +subdirs-y += ./* + +romstage-y += cpu.c + +ramstage-y += cpu.c +ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_SVI2) += svi2.c +ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_SVI3) += svi3.c +ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE) += update_microcode.c + +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE),y) +define add-ucode-as-cbfs +$(if $(value cpu_microcode_$(2).bin-file),$(info File1: $(cpu_microcode_$(2).bin-file)) $(info File2: $(1)) $(error Error: The cbfs filename "cpu_microcode_$(2).bin" is used for both above files. Check your microcode patches for duplicates.)) +cbfs-files-y += cpu_microcode_$(2).bin +cpu_microcode_$(2).bin-file := $(1) +cpu_microcode_$(2).bin-type := microcode + +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y) +cpu_microcode_$(2).bin-align := 64 +else +cpu_microcode_$(2).bin-align := 16 +endif +endef + +$(foreach ucode,$(amd_microcode_bins),$(eval $(call add-ucode-as-cbfs,$(ucode),$(shell hexdump -n 2 -s 0x18 -e '"%x"' $(ucode))))) +endif |