diff options
author | Martin Roth <martinroth@chromium.org> | 2021-06-25 15:09:43 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2021-06-28 15:57:26 +0000 |
commit | fe58977e6fe2501e2ae50ce9a6bd1790e47eadb8 (patch) | |
tree | 8df72465a225c9548c21032104a7d700bbf2b6d3 /src/soc/amd/cezanne | |
parent | 5a3b07d168e574448db3985288551bbb458d31bb (diff) |
soc/amd/cezanne: Add call to mb to configure eSPI requirements
When initializing espi early, there may be mainboard requirements to
configure the bus properly. This allows the mainboard to do that.
BUG=192100564
TEST=Build along with next patch, eSPI works on guybrush
Change-Id: Icc02877a09b8f8ed20fd1b04f3cee0509f1a85c5
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55863
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/cezanne')
-rw-r--r-- | src/soc/amd/cezanne/early_fch.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c index d76afc8174..5d268bcbab 100644 --- a/src/soc/amd/cezanne/early_fch.c +++ b/src/soc/amd/cezanne/early_fch.c @@ -35,6 +35,7 @@ static void reset_i2c_peripherals(void) /* Initialize port80h routing early if needed */ void configure_port80_routing_early(void) { + mb_set_up_early_espi(); if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) espi_setup(); } |