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authorJan Samek <jan.samek@siemens.com>2023-06-09 13:11:45 +0200
committerEric Lai <eric_lai@quanta.corp-partner.google.com>2023-06-15 07:49:03 +0000
commitd0627c7595feb580c8c03f0335644b85bbc842aa (patch)
treeba8a87becb7cd3b0f775008e4f85e1841da509c2 /src/soc/amd/cezanne
parentf27a41f207e195b9dd8d1a0066063d1db329f902 (diff)
mb/siemens/mc_ehl3/devicetree.cb: Disable USB 3.0 port 1
It's been decided not to use the USB 3.0 port 1 on this board anymore, so disable it also with the corresponding USB 2.0 lane. BUG=none TEST=USB 3.0 port 1 not functional anymore after boot, while others continue working. Change-Id: I2799e3d9d7232743c9480dd9611d94ed3249f53b Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75702 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/cezanne')
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