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authorArthur Heymans <arthur@aheymans.xyz>2022-10-04 14:53:56 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-10-13 19:39:20 +0000
commitbd15ece78af605bca9fc092baa094c87d5b8244b (patch)
tree367384023fd4a437d2334706ae971ef0da77bad9 /src/soc/amd/cezanne
parentd6b6b2261667f0a4688fa0cf9f0699596d7efc93 (diff)
soc/amd/*: Move emmc disabling to device ops
This allows for reduced use of chip_operations in the followup patch and allows the allocator to skip over the used mmio. Change-Id: I4052438185e7861792733b96a1298201c73fc3ff Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/cezanne')
-rw-r--r--src/soc/amd/cezanne/Makefile.inc1
-rw-r--r--src/soc/amd/cezanne/chip.c7
-rw-r--r--src/soc/amd/cezanne/emmc.c23
3 files changed, 27 insertions, 4 deletions
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index dc97c1ff4d..95ab4edb4b 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -33,6 +33,7 @@ ramstage-y += agesa_acpi.c
ramstage-y += chip.c
ramstage-y += cpu.c
ramstage-y += data_fabric.c
+ramstage-y += emmc.c
ramstage-y += fch.c
ramstage-y += fsp_s_params.c
ramstage-y += gpio.c
diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c
index f184cb543b..86aaf6ced2 100644
--- a/src/soc/amd/cezanne/chip.c
+++ b/src/soc/amd/cezanne/chip.c
@@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <amdblocks/aoac.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <fsp/api.h>
#include <soc/acpi.h>
-#include <soc/aoac_defs.h>
#include <soc/cpu.h>
#include <soc/data_fabric.h>
#include <soc/pci_devs.h>
@@ -18,6 +16,8 @@
extern struct device_operations soc_amd_i2c_mmio_ops;
/* Supplied by uart.c */
extern struct device_operations cezanne_uart_mmio_ops;
+/* Supplied by emmc.c */
+extern struct device_operations cezanne_emmc_mmio_ops;
struct device_operations cpu_bus_ops = {
.read_resources = noop_read_resources,
@@ -60,8 +60,7 @@ static void set_mmio_dev_ops(struct device *dev)
dev->ops = &cezanne_uart_mmio_ops;
break;
case APU_EMMC_BASE:
- if (!dev->enabled)
- power_off_aoac_device(FCH_AOAC_DEV_EMMC);
+ dev->ops = &cezanne_emmc_mmio_ops;
break;
}
}
diff --git a/src/soc/amd/cezanne/emmc.c b/src/soc/amd/cezanne/emmc.c
new file mode 100644
index 0000000000..a699b20f51
--- /dev/null
+++ b/src/soc/amd/cezanne/emmc.c
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <amdblocks/aoac.h>
+#include <device/device.h>
+#include <soc/aoac_defs.h>
+
+static void emmc_read_resources(struct device *dev)
+{
+ mmio_resource_kb(dev, 0, dev->path.mmio.addr / KiB, 4);
+}
+
+static void emmc_enable(struct device *dev)
+{
+ if (!dev->enabled)
+ power_off_aoac_device(FCH_AOAC_DEV_EMMC);
+}
+
+struct device_operations cezanne_emmc_mmio_ops = {
+ .read_resources = emmc_read_resources,
+ .set_resources = noop_set_resources,
+ .scan_bus = scan_static_bus,
+ .enable = emmc_enable,
+};