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authorZheng Bao <fishbaozi@gmail.com>2023-02-14 13:26:31 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-09-01 11:47:15 +0000
commit6bc06983ed1d6c545056b584eabc2f7864cb39cd (patch)
tree85e01a12ae0de1e768747bc3760ff9300faf517e /src/soc/amd/cezanne
parentd0de6c2183af5f6c435e53632fe92793be4d3783 (diff)
util/amdfwtool: Deal with psp position in flash offset directly
It is based on work by Arthur Heymans, 69852. Get rid of the confusing "position index" and use the relative flash offset as the Kconfig setting instead. TEST=binary identical on amd/birman amd/majolica amd/gardenia amd/mayan amd/bilby amd/mandolin amd/chausie amd/pademelon pcengines/apu2 google/skyrim google/guybrush google/zork google/kahlee google/myst (The test should be done with INCLUDE_CONFIG_FILE=n) Change-Id: I26bde0b7c70efe9f5762109f431329ea7f95b7f2 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72939 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/cezanne')
-rw-r--r--src/soc/amd/cezanne/Kconfig33
-rw-r--r--src/soc/amd/cezanne/Makefile.inc11
2 files changed, 1 insertions, 43 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 2c6e9497c4..d10d857877 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -322,39 +322,6 @@ config DISABLE_KEYBOARD_RESET_PIN
menu "PSP Configuration Options"
-config AMD_FWM_POSITION_INDEX
- int "Firmware Directory Table location (0 to 5)"
- range 0 5
- default 0 if BOARD_ROMSIZE_KB_512
- default 1 if BOARD_ROMSIZE_KB_1024
- default 2 if BOARD_ROMSIZE_KB_2048
- default 3 if BOARD_ROMSIZE_KB_4096
- default 4 if BOARD_ROMSIZE_KB_8192
- default 5 if BOARD_ROMSIZE_KB_16384
- help
- Typically this is calculated by the ROM size, but there may
- be situations where you want to put the firmware directory
- table in a different location.
- 0: 512 KB - 0xFFFA0000
- 1: 1 MB - 0xFFF20000
- 2: 2 MB - 0xFFE20000
- 3: 4 MB - 0xFFC20000
- 4: 8 MB - 0xFF820000
- 5: 16 MB - 0xFF020000
-
-comment "AMD Firmware Directory Table set to location for 512KB ROM"
- depends on AMD_FWM_POSITION_INDEX = 0
-comment "AMD Firmware Directory Table set to location for 1MB ROM"
- depends on AMD_FWM_POSITION_INDEX = 1
-comment "AMD Firmware Directory Table set to location for 2MB ROM"
- depends on AMD_FWM_POSITION_INDEX = 2
-comment "AMD Firmware Directory Table set to location for 4MB ROM"
- depends on AMD_FWM_POSITION_INDEX = 3
-comment "AMD Firmware Directory Table set to location for 8MB ROM"
- depends on AMD_FWM_POSITION_INDEX = 4
-comment "AMD Firmware Directory Table set to location for 16MB ROM"
- depends on AMD_FWM_POSITION_INDEX = 5
-
config AMDFW_CONFIG_FILE
string
default "src/soc/amd/cezanne/fw.cfg"
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index 70170eff0f..7b6c9982cb 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -40,21 +40,12 @@ CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/cezanne
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
# ROMSIG Normally At ROMBASE + 0x20000
-# Overridden by CONFIG_AMD_FWM_POSITION_INDEX
# +-----------+---------------+----------------+------------+
# |0x55AA55AA | | | |
# +-----------+---------------+----------------+------------+
# | | PSPDIR ADDR | BIOSDIR ADDR |
# +-----------+---------------+----------------+
-$(if $(CONFIG_AMD_FWM_POSITION_INDEX), ,\
- $(error Invalid AMD firmware position index. Check if the board sets a valid ROM size))
-
-CEZANNE_FWM_POSITION=$(call int-add, \
- $(call int-subtract, 0xffffffff \
- $(call int-shift-left, \
- 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1)
-
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
# Building the cbfs image will fail if the offset isn't large enough
AMD_FW_AB_POSITION := 0x40
@@ -222,7 +213,7 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \
$(OPT_APOB_NV_BASE) \
$(OPT_VERSTAGE_FILE) \
$(OPT_VERSTAGE_SIG_FILE) \
- --location $(call _tohex,$(CEZANNE_FWM_POSITION)) \
+ --location $(CONFIG_AMD_FWM_POSITION) \
--multilevel \
--output $@