diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2022-07-14 14:32:13 -0600 |
|---|---|---|
| committer | Martin L Roth <gaumless@tutanota.com> | 2022-07-20 14:10:56 +0000 |
| commit | af331a96cc9b3fd5038c1ad4dbbdcba1a49c2aef (patch) | |
| tree | 246805c52133ddb99ed5d6c39693314b0cc5c09c /src/soc/amd/cezanne/uart.c | |
| parent | d797608e73c145ab5d0b408ebfe9cb286bacd812 (diff) | |
vc/amd/fsp/sabrin/bl_uapp_header: Add SoC FW ID at the right offset
SoC FW ID needs to be populated at offset 0x58 and 0x59 in the PSP
header.
BUG=b:217414563
TEST=Build Skyrim BIOS image and ensure that PSP verstage is getting
loaded.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: Ibe7b26aea0567e5337ee3e6e9447aa3944c55f5b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65860
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jon Murphy <jpmurphy@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/cezanne/uart.c')
0 files changed, 0 insertions, 0 deletions